1

Memory System Architect Jobs (NOW HIRING)

Memory System Architect, Silicon

Mountain View, CA · On-site

$286.70K/yr

... architecture. * Experience in building build time configurable designs. * Knowledge in one or more of these areas: coherent interconnects, caches, memory systems. * Knowledge of Hardware Description ...

This team drives memory system architecture in NVIDIA's world changing SOCs for deep-learning, autonomous vehicles and robotics, mobile systems, server systems, and gaming. What You Will Be Doing:

This team drives memory system architecture in NVIDIA's world changing SOCs for deep-learning, autonomous vehicles and robotics, mobile systems, server systems, and gaming. What You Will Be Doing:

This team drives memory system architecture in NVIDIA's world changing SOCs for deep-learning, autonomous vehicles and robotics, mobile systems, server systems, and gaming. What You Will Be Doing:

This team drives memory system architecture in NVIDIA's world changing SOCs for deep-learning, autonomous vehicles and robotics, mobile systems, server systems, and gaming. What You Will Be Doing:

Senior Memory System Engineer

Santa Clara, CA · Hybrid

$122.70K - $167.90K/yr

You will work with memory controller/PHY and Platform / System architect, Firmware, SI/PI, Memory suppliers to design and architect cutting edge, high speed and lower power memory technology for ...

Memory Architect

North, SC · On-site +1

$100K - $500K/yr

You bring 10+ years of experience in memory system architecture, scheduling algorithms, and controller architecture exploration and design. You have hands-on experience building performance/power ...

Ideal candidates will have a strong track record of understanding and analyzing memory systems architecture to improve performance per watt (perf/W) and performance per millimeter (perf/mm). A broad ...

Ideal candidates will have a strong track record of understanding and analyzing memory systems architecture to improve performance per watt (perf/W) and performance per millimeter (perf/mm). A broad ...

Ideal candidates will have a strong track record of understanding and analyzing memory systems architecture to improve performance per watt (perf/W) and performance per millimeter (perf/mm). A broad ...

Ideal candidates will have a strong track record of understanding and analyzing memory systems architecture to improve performance per watt (perf/W) and performance per millimeter (perf/mm). A broad ...

Ideal candidates will have a strong track record of understanding and analyzing memory systems architecture to improve performance per watt (perf/W) and performance per millimeter (perf/mm). A broad ...

Ideal candidates will have a strong track record of understanding and analyzing memory systems architecture to improve performance per watt (perf/W) and performance per millimeter (perf/mm). A broad ...

Ideal candidates will have a strong track record of understanding and analyzing memory systems architecture to improve performance per watt (perf/W) and performance per millimeter (perf/mm). A broad ...

next page

Showing results 1-20

Memory System Architect information

See salary details

$86.5K

$224.3K

$243.5K

How much do memory system architect jobs pay per year?

As of May 31, 2026, the average yearly pay for memory system architect in the United States is $224,334.00, according to ZipRecruiter salary data. Most workers in this role earn between $243,000.00 and $243,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Memory System Architect, and why are they important?

To thrive as a Memory System Architect, you need a deep understanding of memory subsystem design, computer architecture, and performance analysis, typically supported by a degree in electrical engineering or computer science. Familiarity with simulation tools, memory modeling software, and hardware description languages such as Verilog or VHDL is commonly required. Strong problem-solving, collaboration, and communication skills help drive cross-functional innovation and clarify complex design trade-offs. These capabilities are crucial to designing efficient memory solutions that meet performance, power, and scalability requirements in advanced computing systems.

What are some common challenges Memory System Architects face when integrating new memory technologies into existing system architectures?

Memory System Architects often encounter challenges such as ensuring compatibility between emerging memory technologies and legacy system components, optimizing memory bandwidth and latency, and managing power consumption. Balancing performance improvements with system cost and scalability is also critical, especially as workloads and data sizes continue to grow. Collaborating closely with hardware, firmware, and software teams is essential to address these challenges and to ensure seamless integration and optimal system performance.

What is a Memory System Architect?

A Memory System Architect is an engineer who designs and oversees the architecture of memory subsystems within computing platforms, such as computers, servers, or embedded systems. They are responsible for specifying how memory components (like DRAM, SRAM, and flash) interact with processors and other hardware to optimize speed, capacity, power efficiency, and reliability. This role involves working with hardware design, system integration, and sometimes software teams to ensure that the memory system meets performance and cost requirements. Memory System Architects play a key part in advancing technologies for devices ranging from smartphones to high-performance servers.

What is the difference between Memory System Architect vs Memory Design Engineer?

AspectMemory System ArchitectMemory Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields; certifications in memory technologies are a plusBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields; certifications in memory design are common
Work EnvironmentDesign teams, R&D departments, cross-functional collaboration on system-level memory solutionsDesign teams focused on detailed memory chip design, simulation, and testing
Employer & Industry UsageSemiconductor companies, hardware manufacturers, system integratorsMemory chip manufacturers, semiconductor companies, hardware firms

The Memory System Architect focuses on designing and optimizing entire memory systems at a high level, ensuring compatibility and performance across components. In contrast, the Memory Design Engineer concentrates on the detailed design and testing of individual memory chips. Both roles require strong technical skills and industry knowledge but differ in scope and focus.

Infographic showing various Memory System Architect job openings in the United States as of May 2026, with employment types broken down into 2% As Needed, 88% Full Time, 2% Part Time, and 8% Contract. Highlights an 80% Physical, and 20% Remote job distribution, with an average salary of $224,334 per year, or $107.9 per hour.

Memory System Architect, Silicon

Google

Mountain View, CA • On-site

$286.70K/yr

Full-time

Posted 7 days ago


Google rating

8.8

Company rating: 8.8 out of 10

Based on 92 frontline employees who took The Breakroom Quiz

30th of 184 rated software companies


Job description

Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • 8 years of experience in micro-architecture and design of ASIC blocks.
  • Experience in designing/implementing Register-Transfer Level (RTL) for one or more blocks: Central Processing Units (CPUs), Graphics Processing Units (GPUs), caches, Memory Management Units (MMUs), or coherent fabrics.
  • Experience in micro-architecture/design performance analysis, tools, and simulators.

Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science with an emphasis on computer architecture.
  • Experience in building build time configurable designs.
  • Knowledge in one or more of these areas: coherent interconnects, caches, memory systems.
  • Knowledge of Hardware Description Languages (HDL) such as SystemVerilog or Verilog.

About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will shape the future of our coherent memory systems for consumer SoCs. You will leverage your technical expertise in design and uArch to create the most advanced power- and performance-efficient mobile coherent systems. Your work will have a direct impact on the performance, efficiency, and innovation of our next-generation devices. You will work with hardware designers and validation teams to build and test exceptional hardware architectures. As part of this work, you will participate in the development of technology in the memory system and the filing of associated patents.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
The US base salary range for this full-time position is $163,000-$237,000 bonus equity benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google .
Responsibilities
  • Explore and evaluate different uArch and design choices for power- and performance-efficient coherent and non-coherent memory systems.
  • Author hardware uArch specification for next-generation coherent and non-coherent memory systems.
  • Analyze performance and power trade-offs.
  • Work with hardware design, verification, emulation, and validation teams to build and test the hardware architecture.

Information collected and processed as part of your Google Careers profile, and any job applications you choose to submit is subject to Google's Applicant and Candidate Privacy Policy .
Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .
If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form .
Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.
To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.

What Google employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom