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Memory Subsystem Verification Engineer Jobs (NOW HIRING)

Baidu USA

SoC Memory Subsystem Architect

Sunnyvale, CA · On-site

$196K/yr

Work with Hardware design, verification, emulation, and validation teams to build and test the ... Master or PhD in Electrical or Computer Engineering. * Excellent communication skills in both ...

Baya Systems

Hardware Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

DESIGN VERIFICATION ENGINEER SANTA CLARA, CA We are seeking a seasoned Design Verification designer ... Experience on working with IP's for caches, cache coherency, memory subsystems, interconnects, and ...

NVIDIA Corporation

NVIDIA is seeking hardworking, motivated and creative Senior Verification Engineer for our Tegra SoC Memory Subsystem IP verification Team! At NVIDIA, we have crafted a team of outstanding people ...

New

Nvidia

ASIC Verification Engineer

Santa Clara, CA · Hybrid

As a Verification Engineer at NVIDIA, you will be responsible for verifying the design ... memory subsystem units Collaborate with architects, designers, software engineers across sites to ...

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Memory Subsystem Verification Engineer information

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$80K

$142.6K

$203.5K

How much do memory subsystem verification engineer jobs pay per year?

As of Sep 11, 2026, the average yearly pay for memory subsystem verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What is the difference between Memory Subsystem Verification Engineer vs Memory Validation Engineer?

AspectMemory Subsystem Verification EngineerMemory Validation Engineer
Primary FocusVerifying memory subsystem design correctness through simulation and testingValidating memory modules and systems in real-world scenarios
Skills & CertificationsHardware verification, scripting, knowledge of memory architecturesMemory testing, validation tools, quality assurance
Work EnvironmentDesign labs, simulation environments, hardware testing labsField testing, lab environments, customer sites

While both roles involve working with memory technologies, the Memory Subsystem Verification Engineer focuses on verifying the design and functionality of memory subsystems during development. In contrast, the Memory Validation Engineer tests and validates memory modules in real-world conditions to ensure quality and performance before deployment.

What are popular job titles related to Memory Subsystem Verification Engineer jobs?

For Memory Subsystem Verification Engineer jobs, the most frequently searched job titles are:

Infographic showing various Memory Subsystem Verification Engineer job openings in the United States as of August 2026, with employment types broken down into 94% Full Time, 2% Part Time, and 4% Contract. Highlights an 85% Physical, 6% Hybrid, and 9% Remote job distribution, with an average salary of $142,619 per year, or $68.6 per hour.

SoC Memory Subsystem Architect

Sunnyvale, CA • On-site

Baidu USA
See more jobs at Baidu USAexternal

$196K/yr

Full-time

Re-posted 2 days ago

Job description

Do you want to be part of the AI revolution? Do you want to think out of the box, thriving on challenges in AI industry and have the desire to solve them? Do you want to work with a world-class team to explore the fast-growing AI hardware opportunities and impact on AI industry?

We're looking forward to you joining us to collaborate, contribute, and revolutionize AI silicon and system.

Description 

We are looking for a world-class Memory Subsystem Architect to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive in this highly technical environment. Your job responsibilities as a Memory Subsystem Architect will be providing technical leadership through all phases of Baidu's AI SoC development, but primarily focused on unified memory space architecture design for Baidu AI accelerator SoC. The working goal is to build unified memory space for thousands of accelerators from user's perspective.

Developing architecture and micro-architecture to improve the state-of-the-art AI SoC memory system. Explore and evaluate the architectural design choices in SoC fabrics, system caches, system coherency, and MMUs.

Work with software and SoC design team to define architecture and build unified memory space system across distributed AI training system.

Work with Hardware design, verification, emulation, and validation teams to build and test the hardware architecture, performance and functionality.

Participate in performance simulation of features to improve memory subsystem efficiency. Analyzing benchmarks, application workloads and performance simulation results to identify areas for microarchitecture optimizations.

Debug performance and functional issues with high-level models, RTL simulation, and silicon.

Qualifications

  • 10+ years of experience in Silicon architecture or IP design mainly focusing on memory subsystem.
  • Strong understanding of distributed AI training system's requirement on SoC memory subsystem.
  • Demonstrated experience in HW digital design and understanding of CPU/HW Accelerators and/or Peripheral design.
  • Familiarity with SW and Operating system practices and requirements on memory system.
  • Experience in System Performance analysis and debug in pre and/or Post-Silicon environments.
  • Solid background of System interconnect, System MMUs, Caches and Memory Technologies (e.g. HBM, GDDR, DDR and LPDDR4/5).
  • Experience with data analysis using Excel, Perl, Python etc.
  • Master or PhD in Electrical or Computer Engineering.
  • Excellent communication skills in both English and Chinese.

Culture Fit:

  • Mission alignment: If you want to be part of a team to accomplish this great mission, we will provide you the best possible platform to do that.
  • Self-directed: We work best with people that are driven, motivated, and aspire to greatness.
  • Hungry to learn: We are eager to see you learn new skills and grow.
  • Team orientation: We work in small, fast-moving teams. We watch out for each other and go after big goals together as a team.

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