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Mbist Test Engineer Jobs (NOW HIRING)

QFocus Technologies LLC

As a Senior DFT Engineer at QFocus Technologies, you will be responsible for defining, architecting ... Integrate Memory BIST (MBIST) controllers, repair mechanisms, and custom memory test routines.

QFocus Technologies LLC

DFT Engineer

Sunnyvale, CA · On-site

As a Senior DFT Engineer at QFocus Technologies, you will be responsible for defining, architecting ... Integrate Memory BIST (MBIST) controllers, repair mechanisms, and custom memory test routines.

Socket.dev

Design for Test Engineer

Cupertino, CA · On-site

$146K - $218K/yr

Knowledge of MBIST, march algorithms and memory fault models. * Designing Joint Test Action Group (JTAG) architecture and programming DFT control registers for chip testing * Automating DFT design ...

Retym

DFT Engineer

Austin, TX · On-site

As a DFT Engineer you will work closely with all other design teams - backend, verification and ... Experience in IP integration (memories, Test controllers, TAP, MBIST). * Experience using EDA Test ...

Apple

Design for Test Engineer

Cupertino, CA · On-site

$146K - $218K/yr

Knowledge of MBIST, march algorithms and memory fault models. Designing Joint Test Action Group (JTAG) architecture and programming DFT control registers for chip testing Automating DFT design flows ...

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Mbist Test Engineer information

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How much do mbist test engineer jobs pay per hour?

As of Sep 13, 2026, the average hourly pay for mbist test engineer in the United States is $59.03, according to ZipRecruiter salary data. Most workers in this role earn between $44.71 and $75.96 per hour, depending on experience, location, and employer.

What is an Mbist Test Engineer?

Mbist Test Engineers are professionals who specialize in the design, implementation, and validation of Memory Built-In Self-Test (MBIST) circuits within integrated circuits (ICs). Their primary role is to ensure that memory components in chips are tested for faults and defects during manufacturing, using automated self-test techniques. They collaborate with design, verification, and test teams to develop efficient MBIST strategies, analyze test results, and optimize test coverage. These engineers play a critical role in improving the reliability and yield of semiconductor products by identifying faulty memory elements early in the production process.

What skills and qualifications are needed to be an Mbist Test Engineer?

To thrive as an MBIST Test Engineer, you need a solid background in electrical engineering, digital design, and experience with Memory Built-In Self-Test (MBIST) architectures. Familiarity with EDA tools such as Synopsys or Cadence, scripting languages like Python or Perl, and relevant IEEE standards is typically required. Strong problem-solving skills, attention to detail, and effective communication help you excel when diagnosing failures and collaborating with cross-functional teams. These competencies are critical for ensuring reliable memory testing and enhancing the overall quality and yield of integrated circuits.

What challenges do Mbist Test Engineers face when integrating memory built-in self-test (MBIST) solutions into complex SoC designs?

Mbist Test Engineers often encounter challenges such as ensuring MBIST logic compatibility with diverse memory architectures, managing limited design resources (area and power), and coordinating with design and verification teams to resolve integration issues. Debugging failures that arise during post-silicon validation can also be complex, requiring strong analytical skills to trace problems back to design or implementation flaws. Collaborating closely with cross-functional teams and keeping up-to-date with evolving industry tools are key to overcoming these challenges.

What is the difference between Mbist Test Engineer vs Memory Test Engineer?

AspectMbist Test EngineerMemory Test Engineer
CredentialsBachelor's in Electrical Engineering or related; knowledge of BIST and testing toolsBachelor's in Electrical Engineering or related; focus on memory testing techniques
Work EnvironmentSemiconductor companies, testing labs, design teamsSemiconductor firms, memory chip manufacturers, R&D labs
ResponsibilitiesDesign, implement, and verify Built-In Self-Test (BIST) for memory devicesDevelop and execute testing strategies for memory chips, analyze test data

The Mbist Test Engineer specializes in designing and verifying BIST solutions for memory devices, focusing on embedded self-test features. In contrast, the Memory Test Engineer concentrates on overall testing strategies for memory chips, including external testing and validation. Both roles require similar technical skills and work in semiconductor environments, but their focus areas differ within memory testing processes.

What are popular job titles related to Mbist Test Engineer jobs?

For Mbist Test Engineer jobs, the most frequently searched job titles are:

Sr. Design for Test (DFT) Engineer

Boston, MA • On-site

Lightmatter
See more jobs at Lightmatterexternal

Full-time

Re-posted 17 days ago

Job description

 As a Design for Test Engineer you will work closely with all disciplines involved in chip design and product operations to design, validate, and deploy test solutions for digital, analog, and photonic logic. You will be involved in a variety of tasks including logic design, validation and logic simulations, scripting, timing closure, post-silicon planning and bring up, and bringing products to market.

Responsibilities

  • Create new chip, module, and system-level DFT solutions for our highly integrated photonics-based AI platform
  • Develop and deploy DFT methodologies for our next generation products
  • Provide architecture for integrated electronics/analog/digital test including ATPG and boundary scan
  • Work with RTL designers to define front-end integration
  • Work with physical-design engineers to provide backend integration
  • Create automated flow that can scale with the team and company
  • Support initial silicon bring-up through debug 
  • Validate DFT implementation and requirements
  • Proactively solve problems while managing deliverables in a fast-paced, evolving environment.

Minimum Qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
  • At least 5 years of industry experience working on DFT-related activities for advanced ASIC designs
  • Proven experience in pre-silicon design activities
  • Work independently on daily tasks and projects, while seeking guidance for new and unfamiliar assignments.
  • Experience with scripting languages such as Python or TCL
  • Solid understanding of DFT concepts such as Scan, ATPG, memory test, and JTAG
  • Knowledge of Basic SoC Architecture and HDL languages like Verilog
  • Experience working with commercial EDA DFT tools on MBIST, ATPG, and Boundary Scan. 

Preferred Qualifications:

  • Master degree in Electrical Engineering, Computer Engineering, or related field with 3+ years of industry experience working on ASIC designs with multiple production-quality ASIC tapeouts
  • Prior experience working on DFT related tasks in either logic design, validation, implementation or pattern generation and coverage analysis
  • Understanding of industry standards and practices in DFT, including JTAG/BSCAN, at-speed Scan-ATPG, MBIST, and trade-offs between test quality and test time
  • Ability to conduct experiments during silicon debug, gathering and analyzing data, and utilize scripting to support efficient handling of ATE data 
  • Understanding of Timing, Physical Design, and Power impact of DFT structures
  • Strong teamwork and communication skills with the ability to collaborate with multiple functional teams across a variety of fields

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