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Mbist Test Engineer Jobs (NOW HIRING)

Purple Hires Inc

Senior MBIST Engineer

Plano, TX · Remote

Senior MBIST Engineer Remote- Must be working as per PST time zone Rate- 70-75/hr on C2C Position ... Generate and validate MBIST test patterns using Vecgen. * Debug RTL, simulation, and MBIST ...

The AES Group

DFT MBIST Staff Engineer

Allen, TX · Remote

Position Overview We are seeking an experienced DFT MBIST Staff Engineer to join our SoC Design-for-Test (DFT) team. This is a hands-on role focused on Memory BIST (MBIST) implementation using ...

Purple Hires Inc

CMM Programmer

Lafayette, IN · On-site

Generate and validate MBIST test patterns using Vecgen. * Debug RTL, simulation, and MBIST ... The ideal contractor is a senior, hands-on MBIST engineer who can quickly become productive with ...

Efficient Computer

Test Engineer

San Jose, CA · On-site

Generate, validate, and deliver ATPG patterns including scan, MBIST, JTAG, and embedded memory read ... Serve as the primary test engineering interface with OSAT partners and test houses * Manage test ...

Efficient Computer

Test Engineer

San Jose, CA · On-site

$150K - $190K/yr

Generate, validate, and deliver ATPG patterns including scan, MBIST, JTAG, and embedded memory read ... Serve as the primary test engineering interface with OSAT partners and test houses * Manage test ...

Ambiq Micro, Inc.

Principal Engineer - DFT

Austin, TX · On-site

The Principal DFT Engineer will serve as a key technical authority for DFT methodology, working ... Develop and debug ATPG and MBIST test environments and perform pre-layout and post-layout gate ...

Ambiq Micro, Inc.

Principal Engineer - DFT

Austin, TX · On-site

The Principal DFT Engineer will serve as a key technical authority for DFT methodology, working ... Develop and debug ATPG and MBIST test environments and perform pre-layout and post-layout gate ...

Google

DFT Engineer, Google Cloud

Sunnyvale, CA · On-site

Experience with industry-standard test methodologies and platforms, such as ATE, MBIST, JTAG, or System Level Test (SLT). Preferred qualifications: * Master's degree or PhD in Electrical Engineering ...

INFT Solutions, Inc

Test Engineer - ATE / Bench

Dallas, TX · On-site

$50 - $60/hr

... Mbist) and characterize devices across PVT (Process, Voltage, Temperature) Characterize RF, PMIC, or Mixed Signal IP (ADC, DAC, PLL, etc.) Support test program hand-off, production release, yield ...

New

NXP Semiconductors

Test Engineer II

Austin, TX · On-site

Experience with AI processors, SERDES interfaces (PCIe, USB, MIPI, etc.), HVST, scan, MBIST, or analog test is a plus. * Have flexible and diverse programming skills, including Verilog and Python

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Mbist Test Engineer information

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How much do mbist test engineer jobs pay per hour?

As of Sep 13, 2026, the average hourly pay for mbist test engineer in the United States is $59.03, according to ZipRecruiter salary data. Most workers in this role earn between $44.71 and $75.96 per hour, depending on experience, location, and employer.

What is an Mbist Test Engineer?

Mbist Test Engineers are professionals who specialize in the design, implementation, and validation of Memory Built-In Self-Test (MBIST) circuits within integrated circuits (ICs). Their primary role is to ensure that memory components in chips are tested for faults and defects during manufacturing, using automated self-test techniques. They collaborate with design, verification, and test teams to develop efficient MBIST strategies, analyze test results, and optimize test coverage. These engineers play a critical role in improving the reliability and yield of semiconductor products by identifying faulty memory elements early in the production process.

What skills and qualifications are needed to be an Mbist Test Engineer?

To thrive as an MBIST Test Engineer, you need a solid background in electrical engineering, digital design, and experience with Memory Built-In Self-Test (MBIST) architectures. Familiarity with EDA tools such as Synopsys or Cadence, scripting languages like Python or Perl, and relevant IEEE standards is typically required. Strong problem-solving skills, attention to detail, and effective communication help you excel when diagnosing failures and collaborating with cross-functional teams. These competencies are critical for ensuring reliable memory testing and enhancing the overall quality and yield of integrated circuits.

What challenges do Mbist Test Engineers face when integrating memory built-in self-test (MBIST) solutions into complex SoC designs?

Mbist Test Engineers often encounter challenges such as ensuring MBIST logic compatibility with diverse memory architectures, managing limited design resources (area and power), and coordinating with design and verification teams to resolve integration issues. Debugging failures that arise during post-silicon validation can also be complex, requiring strong analytical skills to trace problems back to design or implementation flaws. Collaborating closely with cross-functional teams and keeping up-to-date with evolving industry tools are key to overcoming these challenges.

What is the difference between Mbist Test Engineer vs Memory Test Engineer?

AspectMbist Test EngineerMemory Test Engineer
CredentialsBachelor's in Electrical Engineering or related; knowledge of BIST and testing toolsBachelor's in Electrical Engineering or related; focus on memory testing techniques
Work EnvironmentSemiconductor companies, testing labs, design teamsSemiconductor firms, memory chip manufacturers, R&D labs
ResponsibilitiesDesign, implement, and verify Built-In Self-Test (BIST) for memory devicesDevelop and execute testing strategies for memory chips, analyze test data

The Mbist Test Engineer specializes in designing and verifying BIST solutions for memory devices, focusing on embedded self-test features. In contrast, the Memory Test Engineer concentrates on overall testing strategies for memory chips, including external testing and validation. Both roles require similar technical skills and work in semiconductor environments, but their focus areas differ within memory testing processes.

What are popular job titles related to Mbist Test Engineer jobs?

For Mbist Test Engineer jobs, the most frequently searched job titles are:

Senior MBIST Engineer

Plano, TX • Remote

Purple Hires Inc
See more jobs at Purple Hires Incexternal

Contractor

Re-posted 2 days ago

Job description

Senior MBIST Engineer

Remote- Must be working as per PST time zone

Rate- 70-75/hr on C2C

Position Summary

We are looking for a highly experienced Senior MBIST Contractor to join our SoC Design-for-Test (DFT) team. The role is focused on hands-on Memory BIST implementation using Synopsys MBIST (SMS). The ideal candidate is an independent contributor who can own the complete MBIST flow from insertion through verification, simulation, pattern generation, and Silicon bring-up with minimal supervision.

Responsibilities

• Perform MBIST insertion for complex SoC designs using Synopsys SMS.
• Integrate and verify MBIST at the top level.
• Develop, execute, and debug MBIST simulations using Synopsys VCS, including:
– RTL
– No-delay gate level simulations
– With-delay (timing-aware) simulations
• Generate and validate MBIST test patterns using Vecgen.
• Debug RTL, simulation, and MBIST integration issues.
• Support silicon bring-up, characterization, and post-silicon debug related to MBIST, memory failures, and DFT infrastructure.
• Work closely with DFT, RTL, Physical Design, and Product Engineering teams to resolve implementation issues.
• Drive issue resolution independently and document implementation flows and debug findings.

Required Qualifications

• 8+ years of hands-on DFT experience, with significant focus on MBIST.
• Strong experience with Synopsys MBIST (SMS), preferably SMS6 and/or SMS5.
• Proficiency with Synopsys VCS for MBIST verification and simulation.
• Deep understanding of the complete MBIST flow:
– MBIST insertion
– Top-level integration
– Verification
– Pattern generation (Vecgen)
– Diagnostics
– Simulation and debug
• Strong understanding of MBIST test algorithms (e.g., March algorithms) and memory repair schemes (BIRA/BISR, redundancy analysis, spare row/column allocation).
• Experience running and debugging:
– No-delay simulations
Cisco Confidential
– With-delay simulations
• Experience supporting silicon bring-up, post-silicon debug, and root-cause analysis of MBIST and memory-related failures.
• Strong debugging and root-cause analysis skills across RTL, MBIST, and simulation environments.
• Ability to work independently with minimal supervision.
• Experience with large, complex SoC designs containing multiple memory instances.
• Familiarity with Verilog/SystemVerilog and standard DFT methodologies.

Preferred Qualifications

• Experience with advanced SoC DFT integration.
• Familiarity with ATPG and scan insertion flows.
• Experience with scripting (Tcl, Perl, or Python) to automate MBIST flows and debug.
• Experience working in fast-paced semiconductor product development.

Key Skills

• Synopsys MBIST (SMS5/SMS6)
• Synopsys VCS
• MBIST insertion
• Top-level MBIST verification
• VecGen pattern generation
• MBIST diagnostics
• MBIST repair schemes and memory test algorithms
• No-delay, with-delay simulation and debug
• Silicon bring-up and post-silicon debug
• SoC DFT integration
• Tcl / Perl / Python scripting
• Strong communication skills
• Self-motivated and capable of working independently

Ideal Candidate

The ideal contractor is a senior, hands-on MBIST engineer who can quickly become productive with minimal ramp-up. They should have deep experience with Synopsys SMS and VCS, excellent debugging skills, strong communication abilities, and a proven track record of independently delivering MBIST implementation, verification, and debug for complex SoC designs.