As a Mask Layout Designer, you will have the opportunity to work with a team of layout designers, and design, process integration, and package engineers developing high quality Power MOSFETS for ...
As a Mask Layout Designer, you will have the opportunity to work with a team of layout designers, and design, process integration, and package engineers developing high quality Power MOSFETS for ...
CAD Layout Engineer
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As a Mask Layout Designer, you will have the opportunity to work with a team of layout designers, and design, process integration, and package engineers developing high quality Power MOSFETS for ...
CAD Layout Engineer
Scottsdale, AZ · On-site
As a Mask Layout Designer, you will have the opportunity to work with a team of layout designers, and design, process integration, and package engineers developing high quality Power MOSFETS for ...
The team has an exciting opportunity for a IC Layout Design Engineer V to join our diverse team executing full-custom integrated circuit development with specific responsibility for driving the ...
The team has an exciting opportunity for a IC Layout Design Engineer V to join our diverse team executing full-custom integrated circuit development with specific responsibility for driving the ...
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As an AMR Layout Design Engineer will be responsible for the engineering design and deployment of AMR systems at customer facilities, validating and ensuring the systems as installed are safe and in ...
AMR Layout Design Engineer
Troy, MI · On-site
As an AMR Layout Design Engineer will be responsible for the engineering design and deployment of AMR systems at customer facilities, validating and ensuring the systems as installed are safe and in ...
AMR Layout Design Engineer
Troy, MI · On-site
As an AMR Layout Design Engineer will be responsible for the engineering design and deployment of AMR systems at customer facilities, validating and ensuring the systems as installed are safe and in ...
Quick apply
AMR Layout Design Engineer
Troy, MI · On-site
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Process Development Engineer, IC Design and Reticle Layout
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Partner with Integration Engineers, Customers, and Other Development Engineers to execute ... Perform all tasks related to reticle design and mask layout supporting semiconductor manufacturing ...
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Job Title: "Senior Layout Design Engineer" Location: San Jose, CA (Onsite, 5 days a week) Duration: Long Term Description Client is looking for a talent that has strong background and hands-on ...
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Substrate Layout Design Engineer
Saratoga, CA · On-site
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Saratoga, CA · On-site
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Analog Layout Design engineer - bay area , CA - Onsite Contract position * Minimum 15+ years of related experience with an associate degree. * Own and execute the layout design of analog modules ...
New
Analog Layout Design engineer - bay area , CA - Onsite Contract position * Minimum 15+ years of related experience with an associate degree. * Own and execute the layout design of analog modules ...
New
Principal Layout Design Engineer
Santa Clara, CA · On-site
$182K - $273K/yr
Coach and train junior engineers to foster skill development within the team. About you: * Minimum of 8 years' experience in custom layout design. * Current hands-on experience with 3nm technology is ...
Principal Layout Design Engineer
Santa Clara, CA · On-site
$182K - $273K/yr
Coach and train junior engineers to foster skill development within the team. About you: * Minimum of 8 years' experience in custom layout design. * Current hands-on experience with 3nm technology is ...
Sr. ASIC Layout Design Engineer
Goleta, CA · On-site
$113.60K - $151.40K/yr
We are seeking an experienced Senior Analog/Mixed-Signal Layout Design Engineer to help develop the next generation of high-performance focal-plane array readout integrated circuits (ROICs). These ...
Sr. ASIC Layout Design Engineer
Goleta, CA · On-site
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We are seeking an experienced Senior Analog/Mixed-Signal Layout Design Engineer to help develop the next generation of high-performance focal-plane array readout integrated circuits (ROICs). These ...
We are looking for a Senior Photonic Layout Design Engineer - someone who is excited to join a ... Drive the full tape-out process, including floor planning, waveguide routing, and mask data ...
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Sr. ASIC Layout Design Engineer
$113.60K - $151.40K/yr
We are seeking an experienced Senior Analog/Mixed-Signal Layout Design Engineer to help develop the next generation of high-performance focal-plane array readout integrated circuits (ROICs). These ...
Sr. ASIC Layout Design Engineer
$113.60K - $151.40K/yr
We are seeking an experienced Senior Analog/Mixed-Signal Layout Design Engineer to help develop the next generation of high-performance focal-plane array readout integrated circuits (ROICs). These ...
Principal Layout Design Engineer
Durham, NC · On-site
$182K - $273K/yr
Coach and train junior engineers to foster skill development within the team. About you: * Minimum of 8 years' experience in custom layout design. * Current hands-on experience with 3nm technology is ...
Principal Layout Design Engineer
Durham, NC · On-site
$182K - $273K/yr
Coach and train junior engineers to foster skill development within the team. About you: * Minimum of 8 years' experience in custom layout design. * Current hands-on experience with 3nm technology is ...
Good Understanding of deep sub-micron layout techniques and issues in CMOS process technology nodes ... Mask Design team lead for the client engagement - Interface with the Circuit Design team at Onsite ...
Good Understanding of deep sub-micron layout techniques and issues in CMOS process technology nodes ... Mask Design team lead for the client engagement - Interface with the Circuit Design team at Onsite ...
We need motivated engineers and scientists to spearhead developing new products. A range of ... PIC mask layout design expertise with 10 or more layers * Extensive characterization of ...
We need motivated engineers and scientists to spearhead developing new products. A range of ... PIC mask layout design expertise with 10 or more layers * Extensive characterization of ...
Sr. Photonic IC Layout Engineer
Temecula, CA · On-site
$125K - $185K/yr
All tasks related to mask design and layout of photonic integrated circuits * Creating mask designs in conjunction with optical designers and process engineers. * Creating design rules and ...
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Sr. Photonic IC Layout Engineer
Temecula, CA · On-site
$125K - $185K/yr
All tasks related to mask design and layout of photonic integrated circuits * Creating mask designs in conjunction with optical designers and process engineers. * Creating design rules and ...
Mask Layout Design Engineer information
See salary details
$45K - $57.8K
4% of jobs
$57.8K - $70.5K
2% of jobs
$70.5K - $83.3K
12% of jobs
$93.7K is the 25th percentile. Wages below this are outliers.
$83.3K - $96.1K
9% of jobs
$96.1K - $108.9K
11% of jobs
The median wage is $120.7K / yr.
$108.9K - $121.6K
14% of jobs
$121.6K - $134.4K
22% of jobs
$136.8K is the 75th percentile. Wages above this are outliers.
$134.4K - $147.2K
9% of jobs
$147.2K - $160K
9% of jobs
$160K - $172.7K
3% of jobs
$172.7K - $185.5K
6% of jobs
$45K
$120.8K
$185.5K
How much do mask layout design engineer jobs pay per year?
What are the key skills and qualifications needed to thrive as a Mask Layout Design Engineer, and why are they important?
What are some common challenges Mask Layout Design Engineers face when working on advanced semiconductor nodes?
What are Mask Layout Design Engineers?
What is the difference between Mask Layout Design Engineer vs IC Design Engineer?
| Aspect | Mask Layout Design Engineer | IC Design Engineer |
|---|---|---|
| Credentials | Typically requires a degree in Electrical Engineering or Microelectronics | Typically requires a degree in Electrical Engineering or Computer Engineering |
| Work Environment | Works primarily in mask shops or cleanroom environments focusing on photomask design | Works in design teams, CAD tools, and simulation environments for integrated circuits |
| Industry Usage | Used mainly in semiconductor fabrication and mask manufacturing | Used across semiconductor, consumer electronics, and computing industries |
While both roles require a background in microelectronics and similar technical skills, the Mask Layout Design Engineer specializes in designing photomasks used in chip fabrication, whereas the IC Design Engineer focuses on designing the integrated circuits themselves. Both roles are essential in the semiconductor industry but differ in their specific focus and work environment.
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Onsemi rating
8.0
Based on 18 frontline employees who took The Breakroom Quiz
Job description
Job Summary:
The Power Solutions Group (PSG) MOSFET division of onsemi is seeking a Mask Layout Designer who is self-driven and motivated to join their Discrete Power MOSFET Team. As a Mask Layout Designer, you will have the opportunity to work with a team of layout designers, and design, process integration, and package engineers developing high quality Power MOSFETS for discrete products and modules. This position needs a person at a minimum with a background and use of CAD layout software (preferably Cadence). Not inclusive but preferably its application to layout of discrete power products. Here at onsemi we have a great culture of teamwork in an environment to innovate and design industry leading technology. At onsemi our design team is dedicated to meeting the demands of delivering leading edge technologies and value added products to customers.
More details about our company benefits can be found here:
https://www.onsemi.com/careers/career-benefits
Requirements:
- Associate degree or BS degree in electronics with preferably two or more years experience in industry doing layout.
- Working aptitude for CAD-based design layout software. Proficiency using Cadence Virtuoso is highly desired.
- Demonstrated ability to pay a high attention to detail, to ask clear questions for details, and to produce first-time-error free layouts.
- Good personal skills, willing to work with teams across many geographic locations.
- Experience in discrete Power MOSFET layout is a "Plus".
- Knowledge of "AutoCad" and "Calibre Mask Data Prep Viewer" is a "Plus".
- Fluency in the English language.
- Able to work with a group of engineers inside and outside of the country across multiple time zones.
- Ability to be mentored by and help others learn in a positive team development roll.
- Perform physical design (layout) of discrete power MOSFETs
- Generate verification (DRC), debug using the Calibre CAD tool, and job deck reviews.
- Interface with design, process integration, and package engineers to find optimal layout design solutions for discrete and module power MOSFET's
- Follow New Product Development (NPD) and Technology Development (TD) workflows and documentation procedures.
- Understand how to generate and validate layouts using DRCs.
- Be coachable in coming up to speed and contributing to current workflows and help improve efficiency.
- Participate and support team members in their work and production needs.
- Manage your work to accomplish the tasks needed for maintaining product & technology development schedules.
- Provide technical expertise, guidance, and support to other team members where possible.
- Communicate detailed information needed for quality work throughout the production cycle.
About onsemi
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