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Mask Layout Design Engineer Jobs (NOW HIRING)

As a Mask Layout Designer, you will have the opportunity to work with a team of layout designers, and design, process integration, and package engineers developing high quality Power MOSFETS for ...

As a Mask Layout Designer, you will have the opportunity to work with a team of layout designers, and design, process integration, and package engineers developing high quality Power MOSFETS for ...

The team has an exciting opportunity for a IC Layout Design Engineer V to join our diverse team executing full-custom integrated circuit development with specific responsibility for driving the ...

As an AMR Layout Design Engineer will be responsible for the engineering design and deployment of AMR systems at customer facilities, validating and ensuring the systems as installed are safe and in ...

As an AMR Layout Design Engineer will be responsible for the engineering design and deployment of AMR systems at customer facilities, validating and ensuring the systems as installed are safe and in ...

Analog Layout Design Engineer

Arizona, LA · On-site +1

$193.50K/yr

Analog Layout Design Engineer (Contract Position) Location: Remote | Headquarters: Tempe, Arizona, USA Company: Alphacore Inc. About Us Alphacore Inc. is a fast-growing innovator in high-performance ...

Analog Layout Design Engineer

Tempe, AZ · On-site

$193.50K/yr

Analog Layout Design Engineer (Contract Position) Location: Remote | Headquarters: Tempe, Arizona, USA Company: Alphacore Inc. About Us Alphacore Inc. is a fast-growing innovator in high-performance ...

Position Overview We are seeking an experienced Substrate Layout Design Engineer to support the development of an advanced multi-die organic based flip chip module that integrates multiple dies in a ...

Sr. ASIC Layout Design Engineer

Goleta, CA · On-site

$113.60K - $151.40K/yr

We are seeking an experienced Senior Analog/Mixed-Signal Layout Design Engineer to help develop the next generation of high-performance focal-plane array readout integrated circuits (ROICs). These ...

We are seeking an experienced Senior Analog/Mixed-Signal Layout Design Engineer to help develop the next generation of high-performance focal-plane array readout integrated circuits (ROICs). These ...

Good Understanding of deep sub-micron layout techniques and issues in CMOS process technology nodes ... Mask Design team lead for the client engagement - Interface with the Circuit Design team at Onsite ...

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Mask Layout Design Engineer information

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$45K

$120.8K

$185.5K

How much do mask layout design engineer jobs pay per year?

As of May 31, 2026, the average yearly pay for mask layout design engineer in the United States is $120,849.00, according to ZipRecruiter salary data. Most workers in this role earn between $90,000.00 and $144,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Mask Layout Design Engineer, and why are they important?

To thrive as a Mask Layout Design Engineer, you need a solid background in semiconductor physics, IC design principles, and proficiency with layout tools, usually supported by a degree in electrical engineering or a related field. Expertise in industry-standard EDA tools like Cadence Virtuoso or Synopsys, and familiarity with design rule checks (DRC) and LVS verification are typical technical requirements. Strong attention to detail, problem-solving skills, and effective communication are essential soft skills for collaborating with design and fabrication teams. These abilities are crucial for ensuring accurate and manufacturable integrated circuit layouts that meet performance, cost, and reliability standards.

What are some common challenges Mask Layout Design Engineers face when working on advanced semiconductor nodes?

Mask Layout Design Engineers working on advanced semiconductor nodes often encounter challenges such as managing extremely tight design rules, ensuring layout accuracy to avoid costly fabrication errors, and coordinating with circuit designers to optimize layouts for performance and yield. The increasing complexity of devices at smaller nodes requires careful attention to detail and effective use of electronic design automation (EDA) tools. Collaborating closely with cross-functional teams, including process engineers and verification specialists, is essential to address these challenges and deliver high-quality layouts on schedule.

What are Mask Layout Design Engineers?

Mask Layout Design Engineers are specialized professionals in the semiconductor industry who create detailed layouts for integrated circuits (ICs). They translate circuit schematics into geometric patterns that define where components and connections will be formed on a silicon wafer. Their work ensures that chips are manufacturable, reliable, and meet performance specifications. They work closely with circuit designers and use advanced electronic design automation (EDA) tools to optimize layouts for size, speed, and power efficiency.

What is the difference between Mask Layout Design Engineer vs IC Design Engineer?

AspectMask Layout Design EngineerIC Design Engineer
CredentialsTypically requires a degree in Electrical Engineering or MicroelectronicsTypically requires a degree in Electrical Engineering or Computer Engineering
Work EnvironmentWorks primarily in mask shops or cleanroom environments focusing on photomask designWorks in design teams, CAD tools, and simulation environments for integrated circuits
Industry UsageUsed mainly in semiconductor fabrication and mask manufacturingUsed across semiconductor, consumer electronics, and computing industries

While both roles require a background in microelectronics and similar technical skills, the Mask Layout Design Engineer specializes in designing photomasks used in chip fabrication, whereas the IC Design Engineer focuses on designing the integrated circuits themselves. Both roles are essential in the semiconductor industry but differ in their specific focus and work environment.

More about Mask Layout Design Engineer jobs
What are the most commonly searched types of Mask Layout Design Engineer jobs? The most popular types of Mask Layout Design Engineer jobs are:
Infographic showing various Mask Layout Design Engineer job openings in the United States as of May 2026, with employment types broken down into 91% Full Time, and 9% Part Time. Highlights an 77% Physical, and 23% Remote job distribution, with an average salary of $120,849 per year, or $58.1 per hour.
CAD Layout Engineer

CAD Layout Engineer

onsemi

Scottsdale, AZ

Full-time

Posted 27 days ago


Onsemi rating

8.0

Company rating: 8.0 out of 10

Based on 18 frontline employees who took The Breakroom Quiz


Job description

Job Summary: 

The Power Solutions Group (PSG) MOSFET division of onsemi is seeking a Mask Layout Designer who is self-driven and motivated to join their Discrete Power MOSFET Team. As a Mask Layout Designer, you will have the opportunity to work with a team of layout designers, and design, process integration, and package engineers developing high quality Power MOSFETS for discrete products and modules. This position needs a person at a minimum with a background and use of CAD layout software (preferably Cadence). Not inclusive but preferably its application to layout of discrete power products. Here at onsemi we have a great culture of teamwork in an environment to innovate and design industry leading technology.  At onsemi our design team is dedicated to meeting the demands of delivering leading edge technologies and value added products to customers.


 

onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world's most complex challenges and leads the way in creating a safer, cleaner, and smarter world.

More details about our company benefits can be found here:

https://www.onsemi.com/careers/career-benefits

We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.


onsemi is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, ethnicity, color, religion, ancestry, national origin, age, marital status, pregnancy, sex, sexual orientation, physical or mental disability, medical condition, genetic information, military or veteran status, gender identity, gender expression, or any other protected category under applicable federal, state, or local laws.

If you are an individual with a disability and require a reasonable accommodation to complete any part of the application process, or are limited in the ability or unable to access or use this online application process and need an alternative method for applying, you may contact Talent.acquisition@onsemi.com for assistance.

Requirements: 

  • Associate degree or BS degree in electronics with preferably two or more years experience in industry doing layout.
  • Working aptitude for CAD-based design layout software. Proficiency using Cadence Virtuoso is highly desired.
  • Demonstrated ability to pay a high attention to detail, to ask clear questions for details, and to produce first-time-error free layouts.
  • Good personal skills, willing to work with teams across many geographic locations.
  • Experience in discrete Power MOSFET layout is a "Plus".
  • Knowledge of "AutoCad" and "Calibre Mask Data Prep Viewer" is a "Plus".
  • Fluency in the English language.
  • Able to work with a group of engineers inside and outside of the country across multiple time zones.
  • Ability to be mentored by and help others learn in a positive team development roll.


 

  • Perform physical design (layout) of discrete power MOSFETs
  • Generate verification (DRC), debug using the Calibre CAD tool, and job deck reviews.
  • Interface with design, process integration, and package engineers to find optimal layout design solutions for discrete and module power MOSFET's
  • Follow New Product Development (NPD) and Technology Development (TD) workflows and documentation procedures.
  • Understand how to generate and validate layouts using DRCs.
  • Be coachable in coming up to speed and contributing to current workflows and help improve efficiency.
  • Participate and support team members in their work and production needs.
  • Manage your work to accomplish the tasks needed for maintaining product & technology development schedules.
  • Provide technical expertise, guidance, and support to other team members where possible.
  • Communicate detailed information needed for quality work throughout the production cycle.

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