Elk Grove Village, IL · On-site
$128K - $164K/yr
Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
Elk Grove Village, IL · On-site
$128K - $164K/yr
Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
Chicago, IL · On-site
$180K - $280K/yr
We are looking for talented hardware engineers with a track record of achievement in any domain ... Develop RTL on the latest FPGAs with modern design flows * Following through into production ...
Chicago, IL · On-site
$180K - $280K/yr
We are looking for talented hardware engineers with a track record of achievement in any domain ... Develop RTL on the latest FPGAs with modern design flows * Following through into production ...
$180K - $280K/yr
We are looking for talented hardware engineers with a track record of achievement in any domain ... Develop RTL on the latest FPGAs with modern design flows * Following through into production ...
$180K - $280K/yr
We are looking for talented hardware engineers with a track record of achievement in any domain ... Develop RTL on the latest FPGAs with modern design flows * Following through into production ...
Elk Grove Village, IL · On-site
$128K - $164K/yr
Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
Elk Grove Village, IL · On-site
$128K - $164K/yr
Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
Moline, IL · On-site
... to analyze requirements, prepare design specifications, implement and integrate features ... Knowledge of unit and integration testing tools like Jest, RTL, JUnit and Bruno. * Monitoring ...
Quick apply
Moline, IL · On-site
... to analyze requirements, prepare design specifications, implement and integrate features ... Knowledge of unit and integration testing tools like Jest, RTL, JUnit and Bruno. * Monitoring ...
Mundelein, IL · On-site
As an Eliyan Staff DFT Engineer, you will be working at a fast-paced early-stage startup creating ... at the RTL & gate level * General knowledge of digital and AMS circuit design techniques
Quick apply
Mundelein, IL · On-site
As an Eliyan Staff DFT Engineer, you will be working at a fast-paced early-stage startup creating ... at the RTL & gate level * General knowledge of digital and AMS circuit design techniques
Schaumburg, IL · On-site
$100K - $160K/yr
Design, simulate, and optimize custom antenna elements for wideband and multi-band applications ... Custom ASIC Development: Collaborate with our RF ASIC team on development of beamformer IC ...
Schaumburg, IL · On-site
$100K - $160K/yr
Design, simulate, and optimize custom antenna elements for wideband and multi-band applications ... Custom ASIC Development: Collaborate with our RF ASIC team on development of beamformer IC ...
$100K - $160K/yr
Design, simulate, and optimize custom antenna elements for wideband and multi-band applications ... Custom ASIC Development: Collaborate with our RF ASIC team on development of beamformer IC ...
$100K - $160K/yr
Design, simulate, and optimize custom antenna elements for wideband and multi-band applications ... Custom ASIC Development: Collaborate with our RF ASIC team on development of beamformer IC ...
Chicago, IL · On-site
$133K - $172K/yr
Description Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
Chicago, IL · On-site
$133K - $172K/yr
Description Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
Schaumburg, IL · On-site
$127K - $164K/yr
Description Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
Schaumburg, IL · On-site
$127K - $164K/yr
Description Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
Moline, IL · On-site
... to analyze requirements, prepare design specifications, implement and integrate features ... Knowledge of unit and integration testing tools like Jest, RTL, JUnit and Bruno. * Monitoring ...
Quick apply
Moline, IL · On-site
... to analyze requirements, prepare design specifications, implement and integrate features ... Knowledge of unit and integration testing tools like Jest, RTL, JUnit and Bruno. * Monitoring ...
Chicago, IL · On-site
$120K - $170K/yr
FPGA Engineer Department: Technology Employment Type: Full Time Location: Chicago, IL Description ... design and debug is a plus * 4+ years experience working with FPGA and/or ASIC designs required
Chicago, IL · On-site
$120K - $170K/yr
FPGA Engineer Department: Technology Employment Type: Full Time Location: Chicago, IL Description ... design and debug is a plus * 4+ years experience working with FPGA and/or ASIC designs required
Chicago, IL · On-site
$131K - $175K/yr
Develop testable, performant, and scalable RTL using SpinalHDL. * Support hands on tuning and ... Participate in design, code, and data reviews. Requirements REQUIREMENTS * Bachelor's degree in ...
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Chicago, IL · On-site
$131K - $175K/yr
Develop testable, performant, and scalable RTL using SpinalHDL. * Support hands on tuning and ... Participate in design, code, and data reviews. Requirements REQUIREMENTS * Bachelor's degree in ...
$131K - $175K/yr
Develop testable, performant, and scalable RTL using SpinalHDL. * Support hands on tuning and ... Participate in design, code, and data reviews. Requirements REQUIREMENTS * Bachelor's degree in ...
$131K - $175K/yr
Develop testable, performant, and scalable RTL using SpinalHDL. * Support hands on tuning and ... Participate in design, code, and data reviews. Requirements REQUIREMENTS * Bachelor's degree in ...
Enhance your knowledge of trading, algorithm complexity, system design, and coding * Work within ... Proficient in SystemVerilog, Verilog, VHDL, or other RTL programming (additional software ...
Enhance your knowledge of trading, algorithm complexity, system design, and coding * Work within ... Proficient in SystemVerilog, Verilog, VHDL, or other RTL programming (additional software ...
$120K - $170K/yr
Wolverine Trading is seeking an experienced FPGA Engineer to build high-speed, low latency systems ... design and debug is a plus * 4+ years experience working with FPGA and/or ASIC designs required
$120K - $170K/yr
Wolverine Trading is seeking an experienced FPGA Engineer to build high-speed, low latency systems ... design and debug is a plus * 4+ years experience working with FPGA and/or ASIC designs required
$120K - $170K/yr
Description Wolverine Trading is seeking an experienced FPGA Engineer to build high-speed, low ... design and debug is a plus * 4+ years experience working with FPGA and/or ASIC designs required
Quick apply
$120K - $170K/yr
Description Wolverine Trading is seeking an experienced FPGA Engineer to build high-speed, low ... design and debug is a plus * 4+ years experience working with FPGA and/or ASIC designs required
Batavia, IL · On-site
$99K - $130K/yr
Fermilab is seeking a FPGA Firmware Developer who will design, develop, verify, and integrate FPGA-based systems and embedded firmware. Responsibilities include architecture definition, RTL ...
Batavia, IL · On-site
$99K - $130K/yr
Fermilab is seeking a FPGA Firmware Developer who will design, develop, verify, and integrate FPGA-based systems and embedded firmware. Responsibilities include architecture definition, RTL ...
$117K - $118K/yr
... Engineering to assure effective and efficient projectexecution Education and Experience * hands-on ... digital design from Architecture (schematics and RTL) to GDS * MSEE preferred Key competencies ...
$117K - $118K/yr
... Engineering to assure effective and efficient projectexecution Education and Experience * hands-on ... digital design from Architecture (schematics and RTL) to GDS * MSEE preferred Key competencies ...
Enhance your knowledge of algorithm complexity, professional design, and coding * Work on ... Must have proficient experience in Verilog, SystemVerilog, VHDL or other RTL programming ...
Enhance your knowledge of algorithm complexity, professional design, and coding * Work on ... Must have proficient experience in Verilog, SystemVerilog, VHDL or other RTL programming ...
| Aspect | Locum Asic Rtl Design Engineer | Contract Asic Rtl Design Engineer |
|---|---|---|
| Credentials | Typically requires relevant engineering degrees and RTL design experience | Similar credentials, often with specific RTL design certifications |
| Work Environment | Temporary, short-term assignments often in multiple locations | Project-based roles, usually in a fixed location or remote |
| Employer Usage | Used by agencies or companies needing immediate, short-term expertise | Engaged by companies or staffing agencies for project-specific work |
Both roles involve RTL design skills for ASIC development, but a Locum Asic Rtl Design Engineer typically fills short-term, temporary positions, often through staffing agencies, while a Contract Asic Rtl Design Engineer is engaged for specific projects with defined durations. The main difference lies in the nature and duration of employment, but both require similar technical credentials and work environments.
$128K - $164K/yr
Full-time
Re-posted 19 days ago
Apply Now
RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System Integration, Hardware Security, Xilinx, Simulation, IP core, Versal, Stratix, concept to deployment, Vivado, GHDL, Questa, Quartus Prime, Zynq, Agilex, AXI, ACE, Avalon, FPGA verification tools, reverse engineering, cocotb, pyuvm
Full Time
Travel required to 10%.
Must be able to apply for and maintain a U.S. Government Security Clearance
FPGA Engineer
The EndoSec FPGA Engineer is responsible for the design, development, testing, and maintenance of IP cores and FPGA-based systems used in hardware security applications.
Key Responsibilities
FPGA Design and Development: Design and develop IP cores and FPGA configurations implementing the latest in leakage-resilient hardware cryptography algorithms using state-of-the-art FPGA hardware.
Modeling and Simulation: Use simulation tools and verification frameworks to ensure mathematically-correct logic before hardware deployment.
Hardware/Software Design: Work closely with other engineers to integrate FPGA designs with application software and embedded systems. Implement embedded software-based testing solutions where applicable to validate FPGA designs.
Performance Optimization: Optimize FPGA designs for timing, resource utilization, and throughput. Identify and resolve system bottlenecks.
Testing and Validation: Create comprehensive test and verification plans for FPGA components, conduct unit and integration testing, and validate hardware performance against requirements in a remote environment.
System Integration: Ensure seamless integration between internally-developed and third-party IP cores, FPGA designs, and embedded systems. Collaborate with other engineers to develop and maintain system-level architecture.
Troubleshooting and Debugging: Utilize debugging tools and techniques to diagnose and resolve issues within FPGA designs and hardware platforms.
Documentation: Prepare detailed documentation, including design specifications, testing protocols, and user guides, to support system development and maintenance.
Continuous Learning: Actively stay up-to-date with the latest advancements in FPGA technology and hardware security to continually refine and enhance system capabilities.
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Guided missile and space vehicle manufacturing
11 - 50 Employees
Washington, DC, US
2013
