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Junior Rtl Design Engineer Jobs in Dallas, TX (NOW HIRING)

onsemi

Principal Engineer, Digital Design

Allen, TX · On-site

The Principal Engineer will serve as the technical leader for the IO subsystem, driving architecture, RTL implementation, and design automation strategy, while partnering closely with system ...

Globalfoundries

Staff Engineer AI/ML

Richardson, TX

$143K - $275K/yr

We are seeking an experienced CPU IP Design Engineer. Responsible for Defining, leading and owning RTL development of our latest AI-enabled RISC-V CPU core. The candidate will be responsible for all ...

OSRAM

Senior Staff Digital Design Engineer

Plano, TX · On-site

Senior Staff Digital Design Engineer Plano, Texas, United States Sense the power of light ams OSRAM ... Translate customer and system requirements into optimized RTL architectures and high-quality ...

GlobalFoundries inc.

Staff Engineer AI/ML

Richardson, TX · On-site

$143K - $275K/yr

Summary of Role We are seeking an experienced CPU IP Design Engineer. Responsible for Defining, leading and owning RTL development of our latest AI-enabled RISC-V CPU core. The candidate will be ...

Purple Hires Inc

DFT Engineer

Plano, TX · Remote

Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ... Mentor junior and mid-level DFT engineers and promote best practices in DFT methodology and ...

Purple Hires Inc

ASIC DFT Engineer

Plano, TX · Remote

Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ... Mentor junior and mid-level DFT engineers and promote best practices in DFT methodology and ...

SynQor

Junior Design Engineer

Plano, TX · On-site

$65K - $85K/yr

Description The Junior Design Engineer will be a member of the Product Evolution Process, with a major focus on the design, development, and improvement of state-of-the-art power converters. * AC/DC ...

SynQor

Junior Design Engineer

Plano, TX · On-site

$65K - $85K/yr

The Junior Design Engineer will be a member of the Product Evolution Process, with a major focus on the design, development, and improvement of state-of-the-art power converters. * AC/DC Converters

Purple Hires Inc

ASIC Engineer - Remote

Plano, TX · Remote

Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ... Mentor junior and mid-level DFT engineers and promote best practices in DFT methodology and ...

Purple Hires Inc

Lead ASIC DFT Engineer

Plano, TX · Remote

Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ... Mentor junior and mid-level DFT engineers and promote best practices in DFT methodology and ...

Micron

HBM SOC Design Engineer

Richardson, TX · On-site

As an HBM SOC Design Engineer, you will be responsible for the design & development of next ... You will apply your deep understanding of SOC Architecture, RTL Logic Design, IP Integration, high ...

Texas Instruments

Digital IC Design Engineer

Dallas, TX · On-site

$123K/yr

Drive the full digital flow from RTL to physical layout (RTL-to-GDSII), applying and advancing ... Partner with Design Verification, Validation, Product Engineering, and Test Engineering to ensure a ...

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Junior Rtl Design Engineer information

See Dallas, TX salary details

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$71K

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How much do junior rtl design engineer jobs pay per year?

As of Sep 14, 2026, the average yearly pay for junior rtl design engineer in Dallas, TX is $71,026.00, according to ZipRecruiter salary data. Most workers in this role earn between $48,000.00 and $79,100.00 per year, depending on experience, location, and employer.

What is a junior RTL design engineer?

Junior RTL Design Engineers are entry-level professionals who work on designing and verifying the Register Transfer Level (RTL) logic for digital integrated circuits. They typically use hardware description languages like Verilog or VHDL to describe and simulate the functionality of hardware blocks according to specifications. Their responsibilities often include coding, simulation, debugging, and collaborating with senior engineers to ensure the design meets performance and functional requirements. This role is crucial in the process of creating chips and digital systems used in various electronic devices.

What are the key skills and qualifications needed to thrive as a junior RTL design engineer?

To thrive as a Junior RTL Design Engineer, a solid background in digital logic design, hardware description languages (such as Verilog or VHDL), and a relevant engineering degree are essential. Experience with simulation and synthesis tools (like ModelSim, Synopsys, or Xilinx Vivado) and a basic understanding of ASIC or FPGA flows are typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help individuals excel in translating specifications into efficient hardware designs. These skills ensure accurate, reliable, and high-performance digital circuit development, which is crucial for meeting project goals and industry standards.

What are some common challenges faced by junior RTL design engineers when transitioning from academic projects to industry roles?

Junior RTL Design Engineers often find the transition from academic projects to industry roles challenging due to the increased complexity and scale of commercial designs. In industry, there is a strong emphasis on meeting strict timing, power, and area requirements, as well as adhering to rigorous verification and documentation standards. Collaboration with verification, physical design, and software teams is essential, and juniors may need to quickly adapt to using industry-standard EDA tools and workflows. Gaining proficiency in debugging and understanding legacy codebases are also typical hurdles. However, most teams provide mentorship and structured onboarding to help new engineers succeed.

What is the difference between Junior Rtl Design Engineer vs Digital Design Engineer?

AspectJunior Rtl Design EngineerDigital Design Engineer
Required CredentialsBachelor's in Electrical Engineering or related field; some certificationsBachelor's or higher in Electrical/Electronic Engineering; certifications vary
Work EnvironmentDesign teams in semiconductor or electronics companiesDesign and development teams in similar industries
Employer & Industry UsageCommonly employed in chip design, FPGA, ASIC developmentUsed in digital circuit and system design across industries

Both roles involve digital circuit design, but Junior Rtl Design Engineers focus more on RTL coding and verification, while Digital Design Engineers may handle broader digital system development. The roles often overlap in skills and work environment, with the main difference being scope and experience level.

What are popular job titles related to Junior Rtl Design Engineer jobs in Dallas, TX?

For Junior Rtl Design Engineer jobs in Dallas, TX, the most frequently searched job titles are:

What job categories do people searching Junior Rtl Design Engineer jobs in Dallas, TX look for?

The top searched job categories for Junior Rtl Design Engineer jobs in Dallas, TX are:

What cities near Dallas, TX are hiring for Junior Rtl Design Engineer jobs?

Cities near Dallas, TX with the most Junior Rtl Design Engineer job openings:

Junior Rtl Design Engineer jobs near you

Principal Engineer, Digital Design

Allen, TX • On-site

onsemi
Electrical Equipment, Appliance, and Component Manufacturing • 10K+ employees
Learn more about onsemiexternal

Full-time

Re-posted 26 days ago

Onsemi rating

8.2

Company rating: 8.2 out of 10

Based on 21 frontline employees who took The Breakroom Quiz

Job description

Job Summary: 

We are seeking a Principal Digital Design Engineer based in Allen, TX, to own the IO subsystem for onsemi's microcontroller platform. In this role, you will be responsible for defining, architecting, and delivering a highly configurable IO subsystem that supports a wide range of product requirements across multiple end markets.

This position plays a critical role in enabling platform scalability and product differentiation. The IO subsystem must be flexible, reusable, and optimized for performance, power, and area while supporting a wide range of product requirements. 

The Principal Engineer will serve as the technical leader for the IO subsystem, driving architecture, RTL implementation, and design automation strategy, while partnering closely with system architecture, product lines, DFT, physical design, verification, and software teams. This role requires strong technical execution, cross-functional leadership, and the ability to influence platform direction.


 

onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world's most complex challenges and leads the way in creating a safer, cleaner, and smarter world.

More details about our company benefits can be found here:

https://www.onsemi.com/careers/career-benefits

We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.


onsemi is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, ethnicity, color, religion, ancestry, national origin, age, marital status, pregnancy, sex, sexual orientation, physical or mental disability, medical condition, genetic information, military or veteran status, gender identity, gender expression, or any other protected category under applicable federal, state, or local laws.

If you are an individual with a disability and require a reasonable accommodation to complete any part of the application process, or are limited in the ability or unable to access or use this online application process and need an alternative method for applying, you may contact Talent.acquisition@onsemi.com for assistance.

Required

  • Bachelor's degree in Electrical Engineering or related field (Master's preferred)
  • 10+ years of experience in digital IC design with strong RTL development background
  • Expert-level proficiency in SystemVerilog RTL design
  • Strong experience with Python for design automation and tool development
  • Solid experience with UVM-based verification methodologies and testbench development
  • Strong understanding of UPF, synthesis, STA, and timing signoff flows
  • Experience working with DFT concepts and integration
  • Strong cross-functional collaboration skills across design, verification, physical design, and product teams

Preferred

  • Experience designing IO subsystems or peripheral architectures for microcontrollers or SoCs
  • Experience with design generators, templated RTL, or hardware construction frameworks
  • Exposure to AI/ML techniques applied to hardware design or verification workflows
  • Experience building or deploying automated testbench generation and regression systems
  • Familiarity with highly configurable or parameterized architectures
  • Experience in automotive or safety-critical designs

Responsibilities

  • Own the architecture and development of the IO subsystem, ensuring configurability and reuse across multiple products
  • Define subsystem-level specifications, interfaces, and integration strategy aligned with platform and product requirements
  • Define and implement parameterized and Python generator-based design approaches, enabling scalable and configurable subsystem instantiation
  • Drive the creation of automatically generated testbenches and verification environments, leveraging UVM frameworks and AI-assisted techniques
  • Develop high-quality SystemVerilog RTL, ensuring compatibility with automated generation flows and maintainability at scale
  • Support synthesis, STA, and timing closure activities to ensure signoff-ready designs
  • Collaborate with verification, DFT, and physical design teams to achieve first-time right silicon
  • Apply AI/ML techniques to improve design productivity, including code generation assistance, verification acceleration, and design space exploration
  • Drive PPA optimization while maintaining configurability and reuse targets
  • Establish best practices for design automation, code generation, and methodology standardization across the organization


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