DDR Design Engineer
Austin, TX · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... You will provide high-quality RTL description, including assertions, for the design. Use formal ...
DDR Design Engineer
Austin, TX · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... You will provide high-quality RTL description, including assertions, for the design. Use formal ...
As a logic design engineer, you will be involved in all phases of the design, from concept study ... You will provide high-quality RTL description, including assertions, for the design. Use formal ...
As a logic design engineer, you will be involved in all phases of the design, from concept study ... You will provide high-quality RTL description, including assertions, for the design. Use formal ...
Staff RTL Design Engineer - CPU LS/PF/MMU
Austin, TX · On-site
$178K - $218K/yr
The Role As a CPU Microarchitecture/RTL design engineer at SiFive, you will be part of a team of engineers who are passionate about designing industry-leading CPU cores, based on the revolutionary ...
Staff RTL Design Engineer - CPU LS/PF/MMU
Austin, TX · On-site
$178K - $218K/yr
The Role As a CPU Microarchitecture/RTL design engineer at SiFive, you will be part of a team of engineers who are passionate about designing industry-leading CPU cores, based on the revolutionary ...
Be Seen First
Staff CAD Engineer
Austin, TX · On-site
$70 - $75/hr
We are seeking a Staff CAD Engineer to join Top Semiconductor Companies team in Austin, TX. In this ... Integrate RTL, physical design, and DTCO strategies into cohesive CAD workflows. * Debug complex ...
Quick apply
Be Seen First
Staff CAD Engineer
Austin, TX · On-site
$70 - $75/hr
We are seeking a Staff CAD Engineer to join Top Semiconductor Companies team in Austin, TX. In this ... Integrate RTL, physical design, and DTCO strategies into cohesive CAD workflows. * Debug complex ...
CPU Micro-architect/RTL Designer
Austin, TX · On-site
$211K - $317K/yr
As a CPU Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture, and also help with architecture/product definition through early ...
CPU Micro-architect/RTL Designer
Austin, TX · On-site
$211K - $317K/yr
As a CPU Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture, and also help with architecture/product definition through early ...
CPU Micro-architect/RTL Designer
Austin, TX · On-site
$211K - $317K/yr
As a CPU Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture, and also help with architecture/product definition through early ...
CPU Micro-architect/RTL Designer
Austin, TX · On-site
$211K - $317K/yr
As a CPU Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture, and also help with architecture/product definition through early ...
ASIC Design Engineer
Austin, TX · On-site
$225K - $350K/yr
In addition to hands-on SystemVerilog design, you will mentor junior engineers, influence ... Key Responsibilities Microarchitecture & RTL Leadership: * Define and document microarchitecture ...
ASIC Design Engineer
Austin, TX · On-site
$225K - $350K/yr
In addition to hands-on SystemVerilog design, you will mentor junior engineers, influence ... Key Responsibilities Microarchitecture & RTL Leadership: * Define and document microarchitecture ...
Design Engineering Director
Austin, TX · On-site
Guide and mentor a team of RTL design engineers, fostering a collaborative and innovative environment. Design & Microarchitecture: Define and develop microarchitectural features for IPs and ...
Design Engineering Director
Austin, TX · On-site
Guide and mentor a team of RTL design engineers, fostering a collaborative and innovative environment. Design & Microarchitecture: Define and develop microarchitectural features for IPs and ...
DDR Design Engineer
Austin, TX · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... You will provide high-quality RTL description, including assertions, for the design. Use formal ...
DDR Design Engineer
Austin, TX · On-site
As a logic design engineer, you will be involved in all phases of the design, from concept study ... You will provide high-quality RTL description, including assertions, for the design. Use formal ...
THE ROLE We are looking for an RTL Design Engineer to join our growing Memory Controller Design team. In this role, you will contribute to the development of advanced technologies and help deliver ...
THE ROLE We are looking for an RTL Design Engineer to join our growing Memory Controller Design team. In this role, you will contribute to the development of advanced technologies and help deliver ...
Sr. RTL Design Engineer - DDR/LPDDR Memory Controller
Austin, TX · On-site
$156K/yr
THE ROLE We are looking for an RTL Design Engineer to join our growing Memory Controller Design team. In this role, you will contribute to the development of advanced technologies and help deliver ...
Sr. RTL Design Engineer - DDR/LPDDR Memory Controller
Austin, TX · On-site
$156K/yr
THE ROLE We are looking for an RTL Design Engineer to join our growing Memory Controller Design team. In this role, you will contribute to the development of advanced technologies and help deliver ...
FPGA Design Engineer III
Cedar Park, TX · On-site
$115K - $159K/yr
SUMMARY Firefly is seeking an experienced FPGA RTL Design Engineer with 3+ years of direct professional Verilog hardware design experience. This role focuses on designing, implementing, verifying ...
FPGA Design Engineer III
Cedar Park, TX · On-site
$115K - $159K/yr
SUMMARY Firefly is seeking an experienced FPGA RTL Design Engineer with 3+ years of direct professional Verilog hardware design experience. This role focuses on designing, implementing, verifying ...
ASIC Design Engineer
Austin, TX · On-site
$225K - $350K/yr
In addition to hands‑on SystemVerilog design, you will mentor junior engineers, influence ... Deliver production-quality, parameterized SystemVerilog RTL with well-defined interfaces, power ...
ASIC Design Engineer
Austin, TX · On-site
$225K - $350K/yr
In addition to hands‑on SystemVerilog design, you will mentor junior engineers, influence ... Deliver production-quality, parameterized SystemVerilog RTL with well-defined interfaces, power ...
GPU Design Engineer
Austin, TX · On-site
... engineers), while remaining actively engaged in architecture, RTL micro‑architecture ... Provide hands‑on technical leadership across RTL design and design verification, including ...
GPU Design Engineer
Austin, TX · On-site
... engineers), while remaining actively engaged in architecture, RTL micro‑architecture ... Provide hands‑on technical leadership across RTL design and design verification, including ...
FPGA Design Engineer III
$115K - $159K/yr
SUMMARY Firefly is seeking an experienced FPGA RTL Design Engineer with 3+ years of direct professional Verilog hardware design experience. This role focuses on designing, implementing, verifying ...
FPGA Design Engineer III
$115K - $159K/yr
SUMMARY Firefly is seeking an experienced FPGA RTL Design Engineer with 3+ years of direct professional Verilog hardware design experience. This role focuses on designing, implementing, verifying ...
FPGA Design Engineer III
Cedar Park, TX · On-site
$115K - $159K/yr
SUMMARY Firefly is seeking an experienced FPGA RTL Design Engineer with 3+ years of direct professional Verilog hardware design experience. This role focuses on designing, implementing, verifying ...
FPGA Design Engineer III
Cedar Park, TX · On-site
$115K - $159K/yr
SUMMARY Firefly is seeking an experienced FPGA RTL Design Engineer with 3+ years of direct professional Verilog hardware design experience. This role focuses on designing, implementing, verifying ...
FPGA Design Engineer III
Cedar Park, TX · On-site
$115K - $159K/yr
SUMMARY Firefly is seeking an experienced FPGA RTL Design Engineer with 3+ years of direct professional Verilog hardware design experience. This role focuses on designing, implementing, verifying ...
Quick apply
FPGA Design Engineer III
Cedar Park, TX · On-site
$115K - $159K/yr
SUMMARY Firefly is seeking an experienced FPGA RTL Design Engineer with 3+ years of direct professional Verilog hardware design experience. This role focuses on designing, implementing, verifying ...
FPGA Design Engineer III
Cedar Park, TX · On-site
$115K - $159K/yr
SUMMARY Firefly is seeking an experienced FPGA RTL Design Engineer with 3+ years of direct professional Verilog hardware design experience. This role focuses on designing, implementing, verifying ...
FPGA Design Engineer III
Cedar Park, TX · On-site
$115K - $159K/yr
SUMMARY Firefly is seeking an experienced FPGA RTL Design Engineer with 3+ years of direct professional Verilog hardware design experience. This role focuses on designing, implementing, verifying ...
GPU Design Engineer
Austin, TX · On-site
Engineering Group, Engineering Group > GPU ASICS Engineering General Summary: We are seeking an ... Provide hands-on technical leadership across RTL design and design verification, including ...
GPU Design Engineer
Austin, TX · On-site
Engineering Group, Engineering Group > GPU ASICS Engineering General Summary: We are seeking an ... Provide hands-on technical leadership across RTL design and design verification, including ...
THE ROLE We are looking for an RTL Design Engineer to join our growing Memory Controller Design team. In this role, you will contribute to the development of advanced technologies and help deliver ...
THE ROLE We are looking for an RTL Design Engineer to join our growing Memory Controller Design team. In this role, you will contribute to the development of advanced technologies and help deliver ...
Junior Rtl Design Engineer information
See Austin, TX salary details
$33.2K - $40.1K
3% of jobs
$40.1K - $46.9K
20% of jobs
$48.4K is the 25th percentile. Wages below this are outliers.
$46.9K - $53.8K
7% of jobs
$53.8K - $60.6K
6% of jobs
$60.6K - $67.4K
12% of jobs
The median wage is $67.9K / yr.
$67.4K - $74.3K
17% of jobs
$77.9K is the 75th percentile. Wages above this are outliers.
$74.3K - $81.1K
17% of jobs
$81.1K - $88K
7% of jobs
$88K - $94.8K
4% of jobs
$94.8K - $101.7K
3% of jobs
$101.7K - $108.5K
2% of jobs
$33.2K
$71.2K
$108.5K
How much do junior rtl design engineer jobs pay per year?
As of Sep 11, 2026, the average yearly pay for junior rtl design engineer in Austin, TX is $71,168.00, according to ZipRecruiter salary data. Most workers in this role earn between $48,100.00 and $79,300.00 per year, depending on experience, location, and employer.
What is a junior RTL design engineer?
Junior RTL Design Engineers are entry-level professionals who work on designing and verifying the Register Transfer Level (RTL) logic for digital integrated circuits. They typically use hardware description languages like Verilog or VHDL to describe and simulate the functionality of hardware blocks according to specifications. Their responsibilities often include coding, simulation, debugging, and collaborating with senior engineers to ensure the design meets performance and functional requirements. This role is crucial in the process of creating chips and digital systems used in various electronic devices.
What are the key skills and qualifications needed to thrive as a junior RTL design engineer?
To thrive as a Junior RTL Design Engineer, a solid background in digital logic design, hardware description languages (such as Verilog or VHDL), and a relevant engineering degree are essential. Experience with simulation and synthesis tools (like ModelSim, Synopsys, or Xilinx Vivado) and a basic understanding of ASIC or FPGA flows are typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help individuals excel in translating specifications into efficient hardware designs. These skills ensure accurate, reliable, and high-performance digital circuit development, which is crucial for meeting project goals and industry standards.
What are some common challenges faced by junior RTL design engineers when transitioning from academic projects to industry roles?
Junior RTL Design Engineers often find the transition from academic projects to industry roles challenging due to the increased complexity and scale of commercial designs. In industry, there is a strong emphasis on meeting strict timing, power, and area requirements, as well as adhering to rigorous verification and documentation standards. Collaboration with verification, physical design, and software teams is essential, and juniors may need to quickly adapt to using industry-standard EDA tools and workflows. Gaining proficiency in debugging and understanding legacy codebases are also typical hurdles. However, most teams provide mentorship and structured onboarding to help new engineers succeed.
What is the difference between Junior Rtl Design Engineer vs Digital Design Engineer?
| Aspect | Junior Rtl Design Engineer | Digital Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's in Electrical Engineering or related field; some certifications | Bachelor's or higher in Electrical/Electronic Engineering; certifications vary |
| Work Environment | Design teams in semiconductor or electronics companies | Design and development teams in similar industries |
| Employer & Industry Usage | Commonly employed in chip design, FPGA, ASIC development | Used in digital circuit and system design across industries |
Both roles involve digital circuit design, but Junior Rtl Design Engineers focus more on RTL coding and verification, while Digital Design Engineers may handle broader digital system development. The roles often overlap in skills and work environment, with the main difference being scope and experience level.
What are popular job titles related to Junior Rtl Design Engineer jobs in Austin, TX?
For Junior Rtl Design Engineer jobs in Austin, TX, the most frequently searched job titles are:
What job categories do people searching Junior Rtl Design Engineer jobs in Austin, TX look for?
The top searched job categories for Junior Rtl Design Engineer jobs in Austin, TX are:
What cities near Austin, TX are hiring for Junior Rtl Design Engineer jobs?
Cities near Austin, TX with the most Junior Rtl Design Engineer job openings:
DDR Design Engineer
Austin, TX • On-site
Apple
• Computer and Electronic Product Manufacturing • 10K+ employees10,000+ employees
Full-time
Re-posted 29 days ago
Apple rating
8.1
Based on 684 frontline employees who took The Breakroom Quiz
Job description
At Apple, we work to craft products that enrich people's lives. If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated DDR Design Engineer.
As a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple's customers every single day. You will join the DDR PHY design team. We provide best-in-class PHY designs for high-performance, low power applications. As a logic design engineer, you will be involved in all phases of the design, from concept study, architecture definition, design and verification, to silicon bring-up and characterization.
Description
In this role, you will be responsible for performing concept studies and providing direction in terms of performance, gate count and power for various digital designs. You will be responsible for writing detailed design specification and test plans in close collaboration with architecture, circuit designers and verification engineers. You will provide high-quality RTL description, including assertions, for the design. Use formal tools and static checkers to guarantee RTL quality. You will also support design verification to insure bug-free first silicon. Responsibilities will include driving functional and code coverage as well as timing closure for your designs and supporting silicon bring-up, performance and power characterization.
Minimum Qualifications
Bachelors of Science in Electrical Engineering.
Preferred Qualifications
RTL design using Verilog or SystemVerilog, including assertion writing.
Experience with design of state machines, data paths, arbitration and clock domain crossing logic.
Experience with logic synthesis, timing constraints.
Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL.
Experience with Unified Power Format for simulation, synthesis and electrical rule checking, and equivalence checking.
Prior experience in DDR PHY design and mixed-signal environment is a plus.
As a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple's customers every single day. You will join the DDR PHY design team. We provide best-in-class PHY designs for high-performance, low power applications. As a logic design engineer, you will be involved in all phases of the design, from concept study, architecture definition, design and verification, to silicon bring-up and characterization.
Description
In this role, you will be responsible for performing concept studies and providing direction in terms of performance, gate count and power for various digital designs. You will be responsible for writing detailed design specification and test plans in close collaboration with architecture, circuit designers and verification engineers. You will provide high-quality RTL description, including assertions, for the design. Use formal tools and static checkers to guarantee RTL quality. You will also support design verification to insure bug-free first silicon. Responsibilities will include driving functional and code coverage as well as timing closure for your designs and supporting silicon bring-up, performance and power characterization.
Minimum Qualifications
Bachelors of Science in Electrical Engineering.
Preferred Qualifications
RTL design using Verilog or SystemVerilog, including assertion writing.
Experience with design of state machines, data paths, arbitration and clock domain crossing logic.
Experience with logic synthesis, timing constraints.
Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL.
Experience with Unified Power Format for simulation, synthesis and electrical rule checking, and equivalence checking.
Prior experience in DDR PHY design and mixed-signal environment is a plus.
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976