1

Junior Ic Layout Design Engineer Jobs in Decatur, AL

Leidos Defense is seeking an Electrical Design Engineer join our Huntsville team! Primary Responsibilities * Solve complex electrical problems using off-the-shelf parts as well as the ability to ...

We bring the strength of more than 100 years of experience and renowned engineering expertise to ... layout * Experience with the electrical design process * History with laying out Rigid, Flex, or ...

We bring the strength of more than 100 years of experience and renowned engineering expertise to ... layout * Experience with the electrical design process * History with laying out Rigid, Flex, or ...

Complete details of major layout drawings prepared by others in accordance with standard engineering drafting practices using computer aided design systems. * Determine scaling, inserts necessary ...

Complete details of major layout drawings prepared by others in accordance with standard engineering drafting practices using computer aided design systems. * Determine scaling, inserts necessary ...

Complete details of major layout drawings prepared by others in accordance with standard engineering drafting practices using computer aided design systems. * Determine scaling, inserts necessary ...

next page

Showing results 1-20

Junior Ic Layout Design Engineer information

See Decatur, AL salary details

$31.4K

$67.3K

$102.7K

How much do junior ic layout design engineer jobs pay per year?

As of Jun 9, 2026, the average yearly pay for junior ic layout design engineer in Decatur, AL is $67,308.00, according to ZipRecruiter salary data. Most workers in this role earn between $45,500.00 and $75,000.00 per year, depending on experience, location, and employer.

What does a Junior IC Layout Design Engineer do?

A Junior IC Layout Design Engineer assists in the physical design of integrated circuits (ICs) by translating schematic diagrams into actual chip layouts using specialized CAD tools. Their responsibilities include placing and routing circuit components, ensuring adherence to design rules, verifying layouts for manufacturability, and collaborating with senior engineers to optimize performance and reliability. This entry-level position is essential for creating functional and efficient semiconductor chips used in various electronic devices.

What are some typical challenges faced by Junior IC Layout Design Engineers during their first year on the job?

Junior IC Layout Design Engineers often encounter challenges such as learning to interpret complex circuit schematics, applying foundry-specific design rules, and mastering specialized EDA tools like Cadence Virtuoso. Additionally, collaborating efficiently with circuit designers and verification teams can be demanding as new engineers adjust to fast-paced project timelines and the need for high accuracy. However, with mentorship and hands-on experience, most junior engineers quickly build confidence and develop effective problem-solving skills.

What are the key skills and qualifications needed to thrive as a Junior IC Layout Design Engineer, and why are they important?

To thrive as a Junior IC Layout Design Engineer, a solid understanding of semiconductor physics, electronic circuits, and a relevant engineering degree are essential. Familiarity with EDA tools such as Cadence Virtuoso or Synopsys, and knowledge of design rule checking (DRC) and layout versus schematic (LVS) verification, are typically required. Attention to detail, problem-solving skills, and effective teamwork are important soft skills that help ensure high-quality layouts and collaboration with design teams. These competencies are crucial for producing reliable integrated circuit layouts that meet performance, manufacturability, and project deadlines.

Radar Design Engineer Mid Level

Phased n Research, Inc.

Huntsville, AL โ€ข On-site

Full-time

Posted 20 days ago


Job description

Radar Design Engineer โ€“ Mid-Level; Location: Huntsville, AL; Clearance: Active Secret (with eligibility for Top Secret/SCI); Position Type: Full-Time

About the Role

Phased n Research is seeking a mid-level radar engineer to aid in the design and development of advanced radar systems. This role centers on end-to-end radar design -architecture development, modeling and simulation, algorithm development, waveform design, and hardware prototyping.

Your work will contribute to the development of next-generation DoD radar technologies, including distributed aperture systems. This is a mid-level technical role, wherein you will be expected to develop creative solutions to novel radar problems, outside the scope of conventional textbook radar design. The development of these novel radar solutions will take place in a collaborative, highly technical environment, with guidance from senior technical leadership.

Radar Design & Performance Responsibilities

  • Design novel radar architectures from base physics principles, rather than engineering rules-of-thumb that make simplifying topological assumptions.
  • Develop high-fidelity electromagnetic propagation and signal processing software models.
  • Design algorithms for processing advanced radar data, including data from wide baseline, polarization heterogeneous, and wideband arrays.

Prototyping & Evaluation Responsibilities

  • Design, fabricate, and test radar prototype hardware using commercial-off-the-shelf hardware and manufacturing processes.
  • Design and execute laboratory experiments, intended to validate physics models and radar processing algorithms.
  • Perform prototype hardware tests in the field and post-process field test data.

Collaboration & Program Execution Responsibilities

  • Develop and own technical documentation and design artifacts required to demonstrate progress and support program milestones.
  • Partner with program leadership to ensure technical execution remains aligned with cost, schedule, and performance constraints.
  • Prepare and deliver technical briefings for government stakeholders, design reviews, and program milestones.
  • Serve as a representative in technical interchange meetings and design reviews.

Position Requirements

Mid-Level

  • Master's + 6โ€“12 years of relevant experience, OR
  • Bachelor's + 8โ€“14 years of relevant experience

Additional Requirements

  • Active Secret clearance required (with eligibility for Top Secret/SCI)
  • Demonstrated ability to communicate complex technical concepts clearly to both technical and non-technical audiences.
  • Proven track record of executing technical work independently and mentoring junior engineers.
  • Ability to operate effectively in fast-paced, mission-driven programs.

Preferred Technical Proficiencies

  • Spatial adaptive processing
  • Radar signal processing
  • Object oriented programming
  • Electromagnetic propagation modeling
  • Full wave electromagnetic simulation (e.g., HFSS, CST, etc.)
  • Radar algorithm development
  • Antenna and antenna array design
  • Operation of RF test equipment (e.g., VNA, spectrum analyzer, oscilloscope, etc.)
  • Prototyping and fabrication techniques (e.g., soldering, PCB layout, 3D printing, etc.)
  • Strong physics and mathematics background