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Internship Uap Task Force Jobs in Oregon (NOW HIRING)

The internship will run for 3-6 months over the Spring and Summer months. Start and end dates are ... Provide a variety of day-to-day tasks as required to assist the Property Manager in the management ...

Pharmacist

Springfield, OR · On-site

$67.74 - $101.60/hr

Supervise and trains pharmacy interns and externs. May serve as preceptor for the intern or extern ... Occasionally up to 14 lbs. force. Environmental Conditions * Exposure to biohazard, body fluids and ...

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Internship Uap Task Force information

What is an internship UAP Task Force?

An Internship UAP Task Force typically refers to a team or group within an organization that is dedicated to working on projects related to Unidentified Aerial Phenomena (UAP), sometimes known as UFOs. An intern on this task force would assist with research, data analysis, and reporting concerning UAP sightings or investigations. These roles are generally found in government agencies, scientific organizations, or research institutions that focus on aerospace or national security. Interns may gain hands-on experience in data collection, pattern analysis, and supporting ongoing investigations. The position offers valuable insight into the processes behind UAP studies and interagency collaboration.

What are the key skills and qualifications needed to thrive as an intern with a UAP Task Force?

To thrive as an intern with a UAP (Unidentified Aerial Phenomena) Task Force, you generally need strong analytical abilities, research skills, and a background in relevant fields such as intelligence analysis, aerospace engineering, or data science. Familiarity with technical tools like GIS software, data visualization platforms, and classified information management systems is often required. Attention to detail, critical thinking, and effective communication are vital soft skills for collaborating with multidisciplinary teams and handling sensitive information. These skills ensure accurate data analysis, secure handling of materials, and meaningful contributions to investigations and reports.

What types of projects or tasks can I expect to work on as an intern with the UAP Task Force?

As an intern with the UAP Task Force, you can expect to support a variety of research and analytical projects, such as data collection, case analysis, and assisting with the preparation of reports on unidentified aerial phenomena. Interns often collaborate with multidisciplinary teams, including analysts, scientists, and administrative staff, providing support in organizing information and maintaining databases. This role offers exposure to confidential government procedures and requires a high level of discretion, attention to detail, and the ability to work within a structured, team-oriented environment.
What cities in Oregon are hiring for Internship Uap Task Force jobs? Cities in Oregon with the most Internship Uap Task Force job openings:
Infographic showing various Internship Uap Task Force job openings in Oregon as of June 2026, with employment types broken down into 1% As Needed, 71% Full Time, and 28% Part Time. Highlights an 96% Physical, 1% Hybrid, and 3% Remote job distribution.

Senior Member of Technical Staff (CMP) Engineer

Intel

Hillsboro, OR • On-site

Full-time

Medical, Retirement, PTO

Re-posted 2 days ago


Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

19th of 156 rated electronics manufacturers


Job description

Job Details:Job Description: 

Shape the Future of Semiconductor Innovation at Intel Foundry

Organization Overview

Manufacturing Development Customer Engineering (MDCE) is a newly established organization within Intel Foundry TechnologyManufacturing andis focused on accelerating technologyrampand manufacturing excellence. Our mission is to seamlessly transitioncutting-edgetechnologies from development to high-volume production while making technology ramp a key competitive differentiator for Intel Foundry.

Position Summary

MDCE isseeking aSenior Member of Technical Staff (CMP) Engineer to drive module ownership and technical leadership across Intel's most advanced logic technologies (18A, Intel 3, Intel 12nm). This role requires a seasoned professional who can navigate the complexities of process development, cross-node standardization, and high-volume manufacturing readiness while delivering exceptional results for both Intel products and foundry customers.

Core Responsibilities

Technical Leadership

  • Process Development & Optimization: Lead CMP process development from concept through HVM implementation across multiple advanced technology nodes
  • Cross-Node Alignment: Drive standardization and best practices across Intel's technology portfolio to maximize efficiency and yield
  • Problem Resolution: Own and resolve complex CMP-related yield and manufacturing issues using data-driven approaches and structured problem-solving methodologies

Strategic Execution

  • Customer-Centric Delivery: Align technical strategies with customer requirements and businessobjectives, ensuring on-time delivery of robust solutions
  • Technology Transfer: Bridge technology development and manufacturing teams to ensure smooth transition of CMP processes to production
  • Continuous Improvement: Drive ongoing optimization initiatives to enhance process capability, yield, and manufacturing efficiency

Collaboration & Leadership

  • Cross-Functional Partnership: Work closely with Integration, Device, Yield, Factory, Quality, and Customer Engineering teams
  • Supplier Engagement: Collaborate with equipment and consumables suppliers to co-develop andoptimizeCMP solutions
  • Team Development: Mentor junior engineers andprovidetechnical guidance across the organization

Professional Excellence

  • Proven Track Record: History of significant technical accomplishments and successful project delivery
  • Leadership Capability: Ability to influence and drive results across multiple organizations and disciplines
  • Business Acumen: Understanding of semiconductor industry trends, manufacturing strategies, and customer requirements

Personal Attributes

  • Communication Skills: Exceptional ability to communicate complex technical concepts to diverse audiences
  • Adaptability: Thrives in ambiguous situations and can drive clarity in complex technical challenges while work effectively in fast-paced, high-pressure environments
  • Initiative: Self-motivated with strong persistence and ability to work independently
  • Quality Focus: Meticulous attention to detail with commitment to safety, quality, and compliance standards
Qualifications:

The Minimum qualifications arerequiredto be initially considered for this position.Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to theminimumrequirements and are considered a plus factor inidentifyingtop candidates.

Minimum Qualifications

  • Master's degree in Chemical Engineering, Materials Science, Electrical Engineering, Mechanical Engineering, Physics, or related technical field
  • 7+ years of experiencein semiconductor manufacturing / process development or technology development
  • 4+ years of direct experience in Chemical Mechanical Planarization (CMP) process development experience with hands-on process tuning and characterization
  • Experience with major CMP equipment platformsin one of the followingplatforms(AMAT, Ebara, etc.)
  • Experience with CMP consumables (e.g.slurries, pads, conditioning disks, filters, clean chemistries)
  • Previoussemiconductor foundry experience

Preferred Qualifications

  • Doctoratein Chemical Engineering, Materials Science, Electrical Engineering, Mechanical Engineering, Physics, or related technical field
  • Experience withadvanced technology nodes (e.g.sub-10nm logic,specificallyinGate All Around (GAA) architectureswithtrack recordof successful technology development and HVM implementation
  • Cross-functional leadership experience, including task force leadership for yield improvement initiatives
  • Experience with CMP integration with other process modules (e.g.deposition, lithography, etch, clean)and CMP-relevant metrology with understanding ofCMPimpacton device performance and yield.
  • Experience with CMP-relevant metrology and process control (e.g.thickness, topography, defects, roughness, particles)

Work Environment

This role requiresin-person collaborationto enable rapid decision-making and effective problem resolution.You'llwork in a dynamic, fast-pacedenvironment with competing prioritieswhilemaintainingthe highest standards for safety, quality, and customer satisfaction.

Impact & Growth

Join a team that's reshaping Intel's foundry capabilities and directlyinfluencingthe success of next-generation semiconductor technologies. This role offers exceptional opportunities for professional growth, technical leadership, andmeaningfulimpact on Intel's strategicobjectivesin the foundry market.

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Arizona, PhoenixPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $155,520.00-298,440.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968