... experience, internship experience and / or schoolwork/classes/research. The preferred ... Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or STEM ...
... experience, internship experience and / or schoolwork/classes/research. The preferred ... Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or STEM ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164.47K - $311.89K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164.47K - $311.89K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
SOC Physical Design Static Timing Analysis Engineer
$164.47K - $311.89K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
SOC Physical Design Static Timing Analysis Engineer
$164.47K - $311.89K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
... experience, internship experience and / or schoolwork/classes/research. The preferred ... Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or STEM ...
... experience, internship experience and / or schoolwork/classes/research. The preferred ... Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or STEM ...
Advanced Packaging Design
$131.20K/yr
What You Can Expect As an Advanced Packaging Design engineer, responsibilities include ... every stage - from internship to retirement and through life's most important moments. Our ...
Advanced Packaging Design
$131.20K/yr
What You Can Expect As an Advanced Packaging Design engineer, responsibilities include ... every stage - from internship to retirement and through life's most important moments. Our ...
Advanced Packaging Design
$133.90K/yr
What You Can Expect As an Advanced Packaging Design engineer, responsibilities include ... every stage - from internship to retirement and through life's most important moments. Our ...
Advanced Packaging Design
$133.90K/yr
What You Can Expect As an Advanced Packaging Design engineer, responsibilities include ... every stage - from internship to retirement and through life's most important moments. Our ...
Advanced Packaging Design
Chandler, AZ · On-site
$133.90K/yr
What You Can Expect As an Advanced Packaging Design engineer, responsibilities include ... every stage - from internship to retirement and through life's most important moments. Our ...
Advanced Packaging Design
Chandler, AZ · On-site
$133.90K/yr
What You Can Expect As an Advanced Packaging Design engineer, responsibilities include ... every stage - from internship to retirement and through life's most important moments. Our ...
Mechanical Engineer II (Onsite)
$75.50K - $102.30K/yr
Experience using Computer Aided Design (CAD) software, such as CREO or equivalent * Prior engineering project experience or have completed an internship demonstrating practical application of ...
Mechanical Engineer II (Onsite)
$75.50K - $102.30K/yr
Experience using Computer Aided Design (CAD) software, such as CREO or equivalent * Prior engineering project experience or have completed an internship demonstrating practical application of ...
Fall 2026 Co-Op - Design Verification Engineer
Chandler, AZ · On-site
$133.90K - $163.50K/yr
This internship offers a unique opportunity to work closely with digital and analog designers ... Solid understanding of digital design fundamentals and verification methodologies. #LI-Hybrid ...
Fall 2026 Co-Op - Design Verification Engineer
Chandler, AZ · On-site
$133.90K - $163.50K/yr
This internship offers a unique opportunity to work closely with digital and analog designers ... Solid understanding of digital design fundamentals and verification methodologies. #LI-Hybrid ...
Position Overview We seek a Senior ASIC Design Engineer to provide technical support to Intel ... experience, internship experience and / or schoolwork/classes/research. The preferred ...
Position Overview We seek a Senior ASIC Design Engineer to provide technical support to Intel ... experience, internship experience and / or schoolwork/classes/research. The preferred ...
Position Overview We seek a Senior ASIC Design Engineer to provide technical support to Intel ... experience, internship experience and / or schoolwork/classes/research. The preferred ...
Position Overview We seek a Senior ASIC Design Engineer to provide technical support to Intel ... experience, internship experience and / or schoolwork/classes/research. The preferred ...
The ideal candidate will have an interest in hardware design and experience working on signal and ... every stage - from internship to retirement and through life's most important moments. Our ...
The ideal candidate will have an interest in hardware design and experience working on signal and ... every stage - from internship to retirement and through life's most important moments. Our ...
Senior Mechanical Engineer - Kiewit Power Engineering
Phoenix, AZ · On-site +1
$103.80K - $137K/yr
Design Engineering Market: Power Employment Type: Full Time Position Overview Are you a seasoned ... tanks, blowers and pumps * Prepare mechanical engineering designs, drawings, As-Builts, systems ...
Senior Mechanical Engineer - Kiewit Power Engineering
Phoenix, AZ · On-site +1
$103.80K - $137K/yr
Design Engineering Market: Power Employment Type: Full Time Position Overview Are you a seasoned ... tanks, blowers and pumps * Prepare mechanical engineering designs, drawings, As-Builts, systems ...
Senior Mechanical Engineer - Kiewit Power Engineering
Tempe, AZ · On-site +1
$101.60K - $134.20K/yr
Design Engineering Market: Power Employment Type: Full Time Position Overview Are you a seasoned ... tanks, blowers and pumps * Prepare mechanical engineering designs, drawings, As-Builts, systems ...
Senior Mechanical Engineer - Kiewit Power Engineering
Tempe, AZ · On-site +1
$101.60K - $134.20K/yr
Design Engineering Market: Power Employment Type: Full Time Position Overview Are you a seasoned ... tanks, blowers and pumps * Prepare mechanical engineering designs, drawings, As-Builts, systems ...
The ideal candidate will have an interest in hardware design and experience working on signal and ... every stage - from internship to retirement and through life's most important moments. Our ...
The ideal candidate will have an interest in hardware design and experience working on signal and ... every stage - from internship to retirement and through life's most important moments. Our ...
The ideal candidate will have an interest in hardware design and experience working on signal and ... every stage - from internship to retirement and through life's most important moments. Our ...
The ideal candidate will have an interest in hardware design and experience working on signal and ... every stage - from internship to retirement and through life's most important moments. Our ...
In this role, you will be responsible for assisting in the design aspects of new avionics systems ... Outstanding academics (cumulative GPA greater than or equal to 3.5) * Previous work or internship ...
In this role, you will be responsible for assisting in the design aspects of new avionics systems ... Outstanding academics (cumulative GPA greater than or equal to 3.5) * Previous work or internship ...
As a Civil Engineer for our Site Design team, you will provide basic project design through CAD ... Mentors student interns by providing opportunities for developing basic technical skills and ...
As a Civil Engineer for our Site Design team, you will provide basic project design through CAD ... Mentors student interns by providing opportunities for developing basic technical skills and ...
The Effector RF Design Department is seeking talented engineers with the skills and passion to ... Coursework, project, internship, or professional experience in one or more of the following areas ...
The Effector RF Design Department is seeking talented engineers with the skills and passion to ... Coursework, project, internship, or professional experience in one or more of the following areas ...
Mid-Level Mechanical Designer - Kiewit Power Engineering
Tempe, AZ · On-site +1
$73.90K - $100.10K/yr
Drafting & Design Market: Power Employment Type: Full Time Position Overview We are an innovative ... Train and advise interns or new graduates. * Require little to no supervision required to apply ...
Mid-Level Mechanical Designer - Kiewit Power Engineering
Tempe, AZ · On-site +1
$73.90K - $100.10K/yr
Drafting & Design Market: Power Employment Type: Full Time Position Overview We are an innovative ... Train and advise interns or new graduates. * Require little to no supervision required to apply ...
Internship Tank Design Engineer information
See Phoenix, AZ salary details
$10.98 - $12.65
2% of jobs
$12.65 - $14.32
4% of jobs
$15.99 is the 25th percentile. Wages below this are outliers.
$14.32 - $15.99
19% of jobs
$15.99 - $17.66
24% of jobs
The median wage is $17.77 / hr.
$17.66 - $19.33
17% of jobs
$20.34 is the 75th percentile. Wages above this are outliers.
$19.33 - $21
16% of jobs
$21 - $22.67
6% of jobs
$22.67 - $24.35
5% of jobs
$24.35 - $26.02
3% of jobs
$26.02 - $27.69
3% of jobs
$27.69 - $29.36
1% of jobs
$10
$19
$29
How much do internship tank design engineer jobs pay per hour?
What are the key skills and qualifications needed to thrive as an Internship Tank Design Engineer, and why are they important?
What types of projects or tasks can an Internship Tank Design Engineer expect to work on during their internship?
What does an Internship Tank Design Engineer do?
What is the difference between Internship Tank Design Engineer vs Tank Design Engineer?
| Aspect | Internship Tank Design Engineer | Tank Design Engineer |
|---|---|---|
| Qualifications | Enrolled in or recent graduate of engineering program | Bachelor's or higher in Mechanical or Civil Engineering |
| Work Environment | Internship projects, supervised, entry-level | Full-time professional role, independent responsibilities |
| Responsibilities | Assist in tank design tasks, learn industry standards | Design, analyze, and oversee tank projects independently |
| Industry Usage | Used as a training position in engineering firms | Core role in manufacturing, construction, or engineering firms |
The main difference between an Internship Tank Design Engineer and a Tank Design Engineer is experience and responsibility level. Interns are in training, assisting with tasks under supervision, while Tank Design Engineers are full-time professionals responsible for designing and managing projects independently.
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Full-time
Medical, Retirement, PTO
Posted 22 days ago
Intel rating
8.8
Based on 143 frontline employees who took The Breakroom Quiz
9th of 137 rated electronics manufacturers
Job description
About Intel Foundry
Intel Foundry is a systems foundry transforming the global semiconductor industry by deliveringcutting-edgesilicon process and packaging technology leadership for the AI era.Intel Foundry will be differentiated from other foundries by our world classindustry-leadingIPportfoliothat customers can choose from including, rich IP ecosystem including x86 cores, graphics, AI, and Arm/RISC-V IPs, world-class design services, and operationally resilient global manufacturing with committed capacity in the US and Europe.
Position Overview
We seek aSeniorApplications and Solutions Engineerto provide technical support to Intel Foundry Services customers on PDKs, digital reference flows, and design signoff methodologies withspecializedfocus on Cadence tool suites. This role drives quality improvements in design kits through ASIC design reference flow validation and supports customers through successful tape-outs.
Key Responsibilities
Customer TechnicalSupport & Implementation
- Provide comprehensive technical support to Intel Foundry Services customers on PDKs, digital reference flows, and digital design signoff methodologies
- Support and deliver ASIC/Digital tool/flow/methodologysolutions using Cadence tool suites to address customer issues and ensure successful tape-outs
- Drive customer success through expert guidance on advanced CMOS process implementation
Quality Assurance & Documentation
- Drive quality improvements in design kits and documentation through ASIC design reference flow validation and comprehensive documentation review
- Create application notes, technical content, and deliver training presentations to customers and internal teams
- Establish andmaintainquality assurance processes for design flow validation
Design Flow Development & Optimization
- Develop andoptimizedigital design implementation flows for advanced CMOS processes
- Support hierarchical and multi-voltage domain design approaches,timingand physical convergence
- Build andmaintainquality assurance (QA) regression frameworks for design validation
Core Competencies
- Self-driven and results-oriented with ability to manage multiple tasks effectively
- Strong teamwork skills to drive solutionsfor customer designimplementation challenges
- Analytical problem-solving capabilities for complex design issues
- Excellent communication skills with experience in collaboration and customer feedback
The Minimum qualificationsare required tobe considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to theminimumrequirements and are considered a plus factor inidentifyingtop candidates.
Minimum Qualifications
- US Citizenshiprequired
- Ability to obtain a US Government Security Clearance
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or STEM-related fieldof study
- 4+ yearsofexperience with advanced CMOS processes (22nm and below)
- 3+ yearsofexperience in ASIC physical design implementation and/or ASIC design signoff (SoC/ASIC)
- 3+ yearsofexperienceinone of the followingscripting languages (i.e.Python, Perl,Tcl, shell scripting)
Preferred Qualifications
- Active US Government Security Clearance with a minimum of Secret level
- Post Graduate degree in Electrical / Computer Engineering, Computer Science, or in a STEM related field of study
- Customer-facing experience in technical support roles
- Experience withstate-of-the-artprocess technology (7nm and below)
- Hands-on experience in Cadence EDA-based ASIC design implementation including full-chip integration, synthesis, APR, static timing analysis, layout verification, and reliability verification
- Proficiencywith Cadence EDA tools and flows:Innovus, Tempus,TempusECO, Pegasus,Voltus
- Experience with Synopsys tools (Fusion Compiler,PrimeTime, Prime ECO, ICV) is a plus
- Experience with hierarchical and multi-voltage domain design, top-down design, budgeting, and correlation across implementation and verification tools
What We Offer
- Opportunity to work withcutting-edgedigital design technologies for foundry services
- Direct customer engagement and technical leadership in advanced semiconductor design
- Access to Intel's most advanced foundry technologies and comprehensive EDA tool suites
- Competitive compensation
- Professional development in digital design methodologies and foundry services
- Direct impact on foundry customer success and advanced semiconductor innovation
#cj
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.About Intel
Sourced by ZipRecruiter
Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
Industry
Manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US
Year founded
1968