... internship experiences Minimum Qualifications: * Bachelor's degree in Electrical Engineering ... Logic design and RTL coding techniques. Expertise in power and performance analysis and ...
... internship experiences Minimum Qualifications: * Bachelor's degree in Electrical Engineering ... Logic design and RTL coding techniques. Expertise in power and performance analysis and ...
Lead CPU Design Engineer
Phoenix, AZ · On-site
... internship experiences Minimum Qualifications: * Bachelor's degree in Electrical Engineering ... Logic design and RTL coding techniques. Expertise in power and performance analysis and ...
Lead CPU Design Engineer
Phoenix, AZ · On-site
... internship experiences Minimum Qualifications: * Bachelor's degree in Electrical Engineering ... Logic design and RTL coding techniques. Expertise in power and performance analysis and ...
Design Engineering Manager Work Schedule: Onsite - Phoenix, AZ MOOG Space and Defense Group is a ... internships and apply these to analog, digital or power designs. The ideal candidate must be ...
Design Engineering Manager Work Schedule: Onsite - Phoenix, AZ MOOG Space and Defense Group is a ... internships and apply these to analog, digital or power designs. The ideal candidate must be ...
Associate Electrical Engineer / Electronic Design Engineer.
Phoenix, AZ · On-site
$75K - $105K/yr
Design Engineering Manager Work Schedule: Onsite - Phoenix, AZ MOOG Space and Defense Group is a ... internships and apply these to analog, digital or power designs. The ideal candidate must be ...
Associate Electrical Engineer / Electronic Design Engineer.
Phoenix, AZ · On-site
$75K - $105K/yr
Design Engineering Manager Work Schedule: Onsite - Phoenix, AZ MOOG Space and Defense Group is a ... internships and apply these to analog, digital or power designs. The ideal candidate must be ...
Silicon Packaging Design Engineer
Phoenix, AZ · On-site
$105.65K - $149.15K/yr
As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of ... experience, internship experiences and or schoolwork/classes/research. Minimum Qualifications
Silicon Packaging Design Engineer
Phoenix, AZ · On-site
$105.65K - $149.15K/yr
As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of ... experience, internship experiences and or schoolwork/classes/research. Minimum Qualifications
Silicon Packaging Design Engineer
Phoenix, AZ · On-site
$105.65K - $149.15K/yr
As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of ... experience, internship experiences and or schoolwork/classes/research. Minimum Qualifications
Silicon Packaging Design Engineer
Phoenix, AZ · On-site
$105.65K - $149.15K/yr
As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of ... experience, internship experiences and or schoolwork/classes/research. Minimum Qualifications
Analog Design- Internship
Tempe, AZ · On-site
Analog Design Intern (Summer & Fall 2026) Location: Alphacore HQ | Internship Type: Full-time, Paid ... engineering team Qualifications: • Pursuing BS or MS in Electrical Engineering • Coursework in ...
Analog Design- Internship
Tempe, AZ · On-site
Analog Design Intern (Summer & Fall 2026) Location: Alphacore HQ | Internship Type: Full-time, Paid ... engineering team Qualifications: • Pursuing BS or MS in Electrical Engineering • Coursework in ...
Analog Design- Internship
Tempe, AZ · On-site
Analog Design Intern (Summer & Fall 2026) Location: Alphacore HQ | Internship Type: Full-time, Paid ... engineering team Qualifications: • Pursuing BS or MS in Electrical Engineering • Coursework in ...
Analog Design- Internship
Tempe, AZ · On-site
Analog Design Intern (Summer & Fall 2026) Location: Alphacore HQ | Internship Type: Full-time, Paid ... engineering team Qualifications: • Pursuing BS or MS in Electrical Engineering • Coursework in ...
Package Design Engineer
$133.90K/yr
Package Design: * Lead Si/package/PCB/system co-design work collaborating with downstream system ... every stage - from internship to retirement and through life's most important moments. Our ...
Package Design Engineer
$133.90K/yr
Package Design: * Lead Si/package/PCB/system co-design work collaborating with downstream system ... every stage - from internship to retirement and through life's most important moments. Our ...
Package Design Engineer
$131.20K/yr
Package Design: * Lead Si/package/PCB/system co-design work collaborating with downstream system ... every stage - from internship to retirement and through life's most important moments. Our ...
Package Design Engineer
$131.20K/yr
Package Design: * Lead Si/package/PCB/system co-design work collaborating with downstream system ... every stage - from internship to retirement and through life's most important moments. Our ...
Overview We are seeking a full-time Human Factors Design Engineer in our Chandler, AZ location. In ... Mentor and/or provide training to less-experienced Human Factors Design team members and interns ...
Overview We are seeking a full-time Human Factors Design Engineer in our Chandler, AZ location. In ... Mentor and/or provide training to less-experienced Human Factors Design team members and interns ...
At RTX, our internships, co-ops and full-time careers provide an exceptional foundation to work on ... As a Tool Design Engineer you'll use computer aided design to generate 3-dimensional models and ...
At RTX, our internships, co-ops and full-time careers provide an exceptional foundation to work on ... As a Tool Design Engineer you'll use computer aided design to generate 3-dimensional models and ...
... experience, internship experience and / or schoolwork/classes/research. The preferred ... Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or STEM ...
... experience, internship experience and / or schoolwork/classes/research. The preferred ... Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or STEM ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164.47K - $311.89K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164.47K - $311.89K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164.47K - $311.89K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164.47K - $311.89K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
... experience, internship experience and / or schoolwork/classes/research. The preferred ... Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or STEM ...
... experience, internship experience and / or schoolwork/classes/research. The preferred ... Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or STEM ...
Advanced Packaging Design
$131.20K/yr
What You Can Expect As an Advanced Packaging Design engineer, responsibilities include ... every stage - from internship to retirement and through life's most important moments. Our ...
Advanced Packaging Design
$131.20K/yr
What You Can Expect As an Advanced Packaging Design engineer, responsibilities include ... every stage - from internship to retirement and through life's most important moments. Our ...
Advanced Packaging Design
$133.90K/yr
What You Can Expect As an Advanced Packaging Design engineer, responsibilities include ... every stage - from internship to retirement and through life's most important moments. Our ...
Advanced Packaging Design
$133.90K/yr
What You Can Expect As an Advanced Packaging Design engineer, responsibilities include ... every stage - from internship to retirement and through life's most important moments. Our ...
Advanced Packaging Design
Chandler, AZ · On-site
$133.90K/yr
What You Can Expect As an Advanced Packaging Design engineer, responsibilities include ... every stage - from internship to retirement and through life's most important moments. Our ...
Advanced Packaging Design
Chandler, AZ · On-site
$133.90K/yr
What You Can Expect As an Advanced Packaging Design engineer, responsibilities include ... every stage - from internship to retirement and through life's most important moments. Our ...
Mechanical Engineer II (Onsite)
Phoenix, AZ · On-site
$75.50K - $102.30K/yr
Experience using Computer Aided Design (CAD) software, such as CREO or equivalent * Prior engineering project experience or have completed an internship demonstrating practical application of ...
Mechanical Engineer II (Onsite)
Phoenix, AZ · On-site
$75.50K - $102.30K/yr
Experience using Computer Aided Design (CAD) software, such as CREO or equivalent * Prior engineering project experience or have completed an internship demonstrating practical application of ...
Internship Ski Design Engineer information
See Phoenix, AZ salary details
$9.07 - $11.56
9% of jobs
$11.56 - $14.06
8% of jobs
$14.71 is the 25th percentile. Wages below this are outliers.
$14.06 - $16.56
28% of jobs
The median wage is $17.22 / hr.
$16.56 - $19.05
16% of jobs
$20.76 is the 75th percentile. Wages above this are outliers.
$19.05 - $21.55
20% of jobs
$21.55 - $24.04
9% of jobs
$24.04 - $26.54
4% of jobs
$26.54 - $29.03
1% of jobs
$29.03 - $31.53
1% of jobs
$31.53 - $34.02
1% of jobs
$34.02 - $36.52
2% of jobs
$9
$19
$36
How much do internship ski design engineer jobs pay per hour?
What are the key skills and qualifications needed to thrive as an Internship Ski Design Engineer, and why are they important?
What types of projects and responsibilities can an Internship Ski Design Engineer expect during their placement?
What does an Internship Ski Design Engineer do?
What is the difference between Internship Ski Design Engineer vs Ski Design Engineer?
| Aspect | Internship Ski Design Engineer | Ski Design Engineer |
|---|---|---|
| Qualifications | Enrolled in or recent graduate of relevant engineering or design program | Bachelor's or master's in mechanical, industrial, or ski equipment engineering |
| Work Environment | Internship programs, entry-level projects, supervised tasks | Full-time, professional role with independent responsibilities |
| Responsibilities | Assist in ski design, prototype testing, data collection | Lead design projects, optimize ski performance, collaborate with manufacturing |
The main difference is that an Internship Ski Design Engineer is a temporary, entry-level position focused on learning and assisting, while a Ski Design Engineer is a full-time professional responsible for designing and improving skis independently.
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Intel rating
8.8
Based on 143 frontline employees who took The Breakroom Quiz
9th of 137 rated electronics manufacturers
Job description
The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.
The Role and Impact:
Intel is seeking a highly skilled and motivated CPU Logic Design Engineer to join our innovative team. As a CPU Logic Design Engineer, you will play a pivotal role in designing and developing the logic architecture for CPUs that serve as the backbone of our cutting-edge technologies. Your contributions will directly impact Intel's ability to deliver high-performance, power-efficient processors that drive the future of computing. This is an opportunity to shape the design of CPUs by employing advanced strategies and ensuring robust integration in system-on-chip (SoC) designs. Join us in transforming the world through technology while honing your expertise in logic design and microarchitecture development.
Key Responsibilities:
- Develop the logic design and register transfer level (RTL) coding for CPU features.
- Perform simulation and implement strategies to meet power, performance, area, and timing goals, ensuring design integrity.
- Collaborate on defining architecture and microarchitecture features of the CPU being designed.
- Optimize and debug logic designs using advanced tools and methods.
- Review and contribute to verification plans to ensure correctness of CPU design features.
- Resolve failing RTL tests by implementing corrective measures, ensuring feature correctness and functionality.
- Document micro architectural specifications (MAS) for CPU features.
- Support SoC customers to ensure high-quality integration of CPU blocks in chip designs.
- Someone who can understand how to achieve results in complex multi-site team environment
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences
Minimum Qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.
- 6+ years of experience with a Bachelor's degree, 4+ years with a Master's degree, or 2+ years with a PhD in CPU logic design, RTL coding, or microarchitecture development.
- Logic design and RTL coding techniques. Expertise in power and performance analysis and optimization.
- Microarchitecture fundamentals and low-power design methodologies.
- Experience with debugging and resolving RTL implementation issues.
Preferred Qualifications:
- Strong communication skills and ability to work collaboratively within cross-functional teams.
- Proven ability to deliver high-quality designs under tight deadlines and dynamic project environments.
- Enthusiasm for innovation and staying ahead of industry trends in CPU design.
- Strong knowledge of CPU architecture (concepts such as caching, pipelining, paging, virtual memory, memory tagging and management) and micro-architecture and RTL environment is essential.
- Demonstrated expertise in understanding the design of complex Intel Architecture CPU, developing and debugging of functional tests in Assembly language in pre-silicon simulation environment are required skills.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $164,470.00-269,100.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.About Intel
Sourced by ZipRecruiter
Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
Industry
Manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US
Year founded
1968