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Internship Risc V Jobs in Tempe, AZ (NOW HIRING)

Internship Risc V information

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$8

$16

$22

How much do internship risc v jobs pay per hour?

As of Jul 18, 2026, the average hourly pay for internship risc v in Tempe, AZ is $16.57, according to ZipRecruiter salary data. Most workers in this role earn between $13.80 and $18.41 per hour, depending on experience, location, and employer.

What is the difference between Internship Risc V vs RISC-V Firmware Engineer?

AspectInternship Risc VRISC-V Firmware Engineer
Required CredentialsEnrolled in or recent graduate of Computer Engineering, Electrical Engineering, or related fieldsBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields; experience with embedded systems
Work EnvironmentInternship setting, learning-focused, entry-level tasksFull-time, professional environment, developing and testing firmware
Employer & Industry UsageTech companies, startups, research labs focusing on RISC-V architectureHardware and software companies developing RISC-V based products

Internship Risc V positions are entry-level, designed for students or recent graduates gaining hands-on experience. RISC-V Firmware Engineers are full-time professionals responsible for developing and maintaining firmware for RISC-V processors. The internship offers learning opportunities, while the engineer role involves advanced technical work and project ownership.

What are the key skills and qualifications needed to thrive as an Internship RISC-V Engineer, and why are they important?

To thrive as a RISC-V intern, you need foundational knowledge in computer architecture, digital design, and programming, often demonstrated through coursework in electrical or computer engineering. Familiarity with hardware description languages (such as Verilog or VHDL), simulation tools, and RISC-V development environments is typically required. Strong problem-solving abilities, attention to detail, and effective teamwork skills distinguish top candidates in this role. These skills and qualities are critical for successfully contributing to open-source hardware projects and collaborating with experienced engineers on innovative processor designs.

What is an Internship Risc V?

An Internship Risc V typically refers to an internship position focused on working with RISC-V, an open standard instruction set architecture used in computer processors. Interns in this role often assist with hardware or software development, verification, and testing related to RISC-V based systems or tools. The internship provides practical experience in computer architecture, embedded systems, and open-source hardware ecosystems. It is ideal for students or recent graduates in computer engineering, electrical engineering, or related fields who are interested in processor design and open-source technologies.

What types of projects and tasks can I expect to work on during a RISC-V internship?

As a RISC-V intern, you'll typically engage in hands-on projects involving the design, simulation, or verification of RISC-V processor cores and related hardware components. Interns often assist with writing and testing code for hardware description languages (such as Verilog or VHDL), running simulations, analyzing performance, and debugging issues. You may also collaborate closely with hardware engineers and software developers, gaining exposure to the full hardware-software co-design process. This experience provides valuable insight into both the technical and collaborative aspects of semiconductor development.
What are popular job titles related to Internship Risc V jobs in Tempe, AZ? For Internship Risc V jobs in Tempe, AZ, the most frequently searched job titles are:
What job categories do people searching Internship Risc V jobs in Tempe, AZ look for? The top searched job categories for Internship Risc V jobs in Tempe, AZ are:
What cities near Tempe, AZ are hiring for Internship Risc V jobs? Cities near Tempe, AZ with the most Internship Risc V job openings:
Infographic showing various Internship Risc V job openings in Tempe, AZ as of July 2026, with employment types broken down into 41% Internship, and 59% Full Time. Highlights an 100% In-person job distribution, with an average salary of $34,475 per year, or $16.6 per hour.
Senior Applications and Solutions Engineer - Foundry Services

Senior Applications and Solutions Engineer - Foundry Services

Intel

Phoenix, AZ

Full-time

Medical, Retirement, PTO

Re-posted 12 days ago


Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

11th of 143 rated electronics manufacturers


Job description

Job Details:Job Description: 

Intel Foundry is a systems foundry transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. Intel Foundry will be differentiated from other foundries by our world class industry-leading IP portfolio that customers can choose from including rich IP ecosystem including x86 cores, graphics, AI, and Arm/RISC-V IPs, world-class design services, and operationally resilient global manufacturing with committed capacity in the US and Europe.
Position Overview
We seek a Senior ASIC Design Engineer to provide technical support to Intel Foundry Services customers on PDKs through ASIC design implementation flows and to perform ASIC physical design execution with specialized focus on complex multi-voltage domain (UPF/CPF) designs and power-intent (VCLP and Conformal LP) verification signoff. This role drives quality improvements in design kits, supports customers through successful tape-outs, and performs ASIC design service on complex multi-voltage domain designs.
Key Responsibilities
Customer Technical Support and ASIC Design Execution

  • Provide comprehensive technical support to Intel Foundry Services customers on PDKs, digital reference flows and digital design signoff methodologies in multi-voltage domain implementation and verification.
  • Support and deliver ASIC/Digital tool/flow/methodology solutions, especially in multi-voltage domain design implementation and verification using Cadence and Synopsys tool suites. Have deep knowledge of UPF/CPF (level-shifter, isolation, power gating, retention, always-on) implementation and verification using (VCLP and Conformal LP). Have experience in writing and debugging UPF/CPF for multi-voltage domain designs.
  • Drive customer success through expert guidance and have strong hand-on experience in ASIC design execution


Quality Assurance and Documentation

  • Drive quality improvements in design kits and documentation through ASIC design reference flow validation and comprehensive documentation review
  • Create application notes, technical design checklists, and deliver training presentations to customers and internal teams
  • Establish and maintain high quality design through implementation and verification methodologies and checklists


Core Competencies

  • Self-driven and results-oriented with ability to manage multiple tasks effectively
  • Strong teamwork skills to drive solutions for implementation challenge
  • Analytical problem-solving capabilities for complex design issues
  • Excellent communication skills with experience in collaboration and customer feedback
Qualifications:

The Minimum qualifications are required to be considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications

  • US Citizenship required.
  • Ability to obtain a US Government Security Clearance.
  • Bachelor's degree in Electrical / Computer Engineering, Computer Science, or in a STEM related field of study.
  • 4+ years of experience with advanced CMOS processes (16nm and below).
  • 3+ years of experience in ASIC design implementing and verification in area of low power, multi-voltage domain
  • 3+ years of experience in scripting languages like Python, Perl, Tcl, and/or shell scripting


Preferred Qualifications

  • Active US Government Security Clearance with a minimum of Secret level
  • Post Graduate degree in Electrical / Computer Engineering, Computer Science, or in a STEM related field of study
  • Experience with state-of-the-art process technology (7nm and below)
  • Hands-on experience in physical design Implementation and verification methodology for multi-voltage domain in SoC design
  • Experience using EDA tools for multi-power domain design (UPF/CPF) implementation and power-intent verification (VCLP, Conformal LP) at block and at SOC level
  • Experience in writing and debugging UPF/CPF for multi-voltage domain designs
  • Customer-facing experience in technical support roles

# cj

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Arizona, PhoenixAdditional Locations:US, California, Santa Clara, US, Oregon, HillsboroBusiness group:The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

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Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968