RF Validation Engineer
Sunnyvale, CA · On-site
RF Validation Engineer (High Priority) Location: Sunnyvale, CA Client: Meta JD: Work with RF lead ... RFIC design.
RF Validation Engineer
Sunnyvale, CA · On-site
RF Validation Engineer (High Priority) Location: Sunnyvale, CA Client: Meta JD: Work with RF lead ... RFIC design.
Ph.D. in Electrical Engineering (or related) with 6+ years of analog/mixed-signal IC design ... RFIC design experience: LNA, mixer, PA driver, Broadband amplifiers, RF front-end modules.
Ph.D. in Electrical Engineering (or related) with 6+ years of analog/mixed-signal IC design ... RFIC design experience: LNA, mixer, PA driver, Broadband amplifiers, RF front-end modules.
Principal Engineer, RFIC
$214K - $341K/yr
... engineer that has strong background and hands-on experience on RFIC design. The candidate will be ... Design low-power and low-voltage RF and Analog circuits using advanced deep-submicron CMOS ...
Quick apply
Principal Engineer, RFIC
$214K - $341K/yr
... engineer that has strong background and hands-on experience on RFIC design. The candidate will be ... Design low-power and low-voltage RF and Analog circuits using advanced deep-submicron CMOS ...
Design Engineer I
Santa Cruz, CA · On-site
Design Engineer I CA | GA | NY | CR About Sherwood Design Engineers Sherwood is a civil and ... Typically industry internship experience * Bachelor's degree in Engineering - Civil and/or ...
Design Engineer I
Santa Cruz, CA · On-site
Design Engineer I CA | GA | NY | CR About Sherwood Design Engineers Sherwood is a civil and ... Typically industry internship experience * Bachelor's degree in Engineering - Civil and/or ...
Principal Engineer, RFIC
San Jose, CA · On-site
$214K - $341K/yr
... engineer that has strong background and hands-on experience on RFIC design. The candidate will be ... Design low-power and low-voltage RF and Analog circuits using advanced deep-submicron CMOS ...
Principal Engineer, RFIC
San Jose, CA · On-site
$214K - $341K/yr
... engineer that has strong background and hands-on experience on RFIC design. The candidate will be ... Design low-power and low-voltage RF and Analog circuits using advanced deep-submicron CMOS ...
RFIC Layout Engineer
San Francisco, CA · On-site
To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and ... Description As an RFIC Layout Engineer, you will be a key member of a RFIC team, researching ...
RFIC Layout Engineer
San Francisco, CA · On-site
To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and ... Description As an RFIC Layout Engineer, you will be a key member of a RFIC team, researching ...
RFIC Layout Engineer
San Francisco, CA · On-site
To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and ... Description As an RFIC Layout Engineer, you will be a key member of a RFIC team, researching ...
RFIC Layout Engineer
San Francisco, CA · On-site
To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and ... Description As an RFIC Layout Engineer, you will be a key member of a RFIC team, researching ...
Exposure to mixed-signal or RFIC design in advanced CMOS nodes (28nm, 22nm, 16nm FD-SOI or FinFET ... engineering workflows is a genuine differentiator * Experience applying AI to technical ...
Exposure to mixed-signal or RFIC design in advanced CMOS nodes (28nm, 22nm, 16nm FD-SOI or FinFET ... engineering workflows is a genuine differentiator * Experience applying AI to technical ...
RFIC Layout Designer (RFIC Engineering)
$130K - $185K/yr
We design, build, test, and operate all parts of the system - thousands of satellites, consumer ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...
RFIC Layout Designer (RFIC Engineering)
$130K - $185K/yr
We design, build, test, and operate all parts of the system - thousands of satellites, consumer ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...
Exposure to mixed-signal or RFIC design in advanced CMOS nodes (28nm, 22nm, 16nm FD-SOI or FinFET ... engineering workflows is a genuine differentiator * Experience applying AI to technical ...
Quick apply
Exposure to mixed-signal or RFIC design in advanced CMOS nodes (28nm, 22nm, 16nm FD-SOI or FinFET ... engineering workflows is a genuine differentiator * Experience applying AI to technical ...
RFIC Layout Designer (RFIC Engineering)
Palo Alto, CA · On-site
$130K - $185K/yr
We design, build, test, and operate all parts of the system - thousands of satellites, consumer ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...
RFIC Layout Designer (RFIC Engineering)
Palo Alto, CA · On-site
$130K - $185K/yr
We design, build, test, and operate all parts of the system - thousands of satellites, consumer ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...
Sr. RFIC Layout Designer (RFIC Engineering)
Palo Alto, CA · On-site
$150K - $245K/yr
We design, build, test, and operate all parts of the system - thousands of satellites, consumer ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...
Sr. RFIC Layout Designer (RFIC Engineering)
Palo Alto, CA · On-site
$150K - $245K/yr
We design, build, test, and operate all parts of the system - thousands of satellites, consumer ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...
Sr. RFIC Layout Designer (RFIC Engineering)
Palo Alto, CA · On-site
$150K - $245K/yr
We design, build, test, and operate all parts of the system - thousands of satellites, consumer ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...
Sr. RFIC Layout Designer (RFIC Engineering)
Palo Alto, CA · On-site
$150K - $245K/yr
We design, build, test, and operate all parts of the system - thousands of satellites, consumer ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...
Design Engineer - Americas
San Francisco, CA · Remote
$126K - $250K/yr
You have 2+ years of continuous experience (e.g., internships don't count) as an Engineer or a Designer. You have good proficiency in both Design and Engineering, with exceptional proficiency in the ...
Quick apply
Design Engineer - Americas
San Francisco, CA · Remote
$126K - $250K/yr
You have 2+ years of continuous experience (e.g., internships don't count) as an Engineer or a Designer. You have good proficiency in both Design and Engineering, with exceptional proficiency in the ...
Hardware Design Engineer
Fremont, CA · On-site
$99K - $135K/yr
Maintain Bills of Materials (BOMs), schematics, engineering change orders, and design documentation ... Internship or project experience involving hardware validation and debug. Compensation & Benefits
Hardware Design Engineer
Fremont, CA · On-site
$99K - $135K/yr
Maintain Bills of Materials (BOMs), schematics, engineering change orders, and design documentation ... Internship or project experience involving hardware validation and debug. Compensation & Benefits
RFIC System Engineer
San Francisco, CA · On-site
To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and ... As an RFIC system engineer, you will be at the center of this wireless SoC design group. You will ...
RFIC System Engineer
San Francisco, CA · On-site
To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and ... As an RFIC system engineer, you will be at the center of this wireless SoC design group. You will ...
Hardware Design Engineer
Fremont, CA · Hybrid
$99K - $135K/yr
Maintain Bills of Materials (BOMs), schematics, engineering change orders, and design documentation ... Internship or project experience involving hardware validation and debug. Compensation & Benefits
Hardware Design Engineer
Fremont, CA · Hybrid
$99K - $135K/yr
Maintain Bills of Materials (BOMs), schematics, engineering change orders, and design documentation ... Internship or project experience involving hardware validation and debug. Compensation & Benefits
Mechanical Design Engineer
San Francisco, CA · On-site
$115K - $200K/yr
In This Role, You'll Design & Engineering * Own mechanical subsystem design from concept to ... Have internship or early-career experience on real hardware projects or at hardware startups * Are ...
Mechanical Design Engineer
San Francisco, CA · On-site
$115K - $200K/yr
In This Role, You'll Design & Engineering * Own mechanical subsystem design from concept to ... Have internship or early-career experience on real hardware projects or at hardware startups * Are ...
RFIC System Engineer
San Francisco, CA · On-site
To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and ... As an RFIC system engineer, you will be at the center of this wireless SoC design group. You will ...
RFIC System Engineer
San Francisco, CA · On-site
To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and ... As an RFIC system engineer, you will be at the center of this wireless SoC design group. You will ...
Digital IC Design Engineer Intern
South San Francisco, CA · On-site
$35/hr
As a Digital IC Design Engineer Intern, your responsibilities will include: * Micro-architecture ... Temporary Employees & Interns excluded
Digital IC Design Engineer Intern
South San Francisco, CA · On-site
$35/hr
As a Digital IC Design Engineer Intern, your responsibilities will include: * Micro-architecture ... Temporary Employees & Interns excluded
Internship Rfic Design Engineer information
See San Jose, CA salary details
$15.78 - $18.47
5% of jobs
$18.47 - $21.16
7% of jobs
$23.79 is the 25th percentile. Wages below this are outliers.
$21.16 - $23.84
13% of jobs
$23.84 - $26.53
9% of jobs
The median wage is $28.70 / hr.
$26.53 - $29.22
19% of jobs
$29.22 - $31.91
18% of jobs
$32.58 is the 75th percentile. Wages above this are outliers.
$31.91 - $34.60
14% of jobs
$34.60 - $37.29
7% of jobs
$37.29 - $39.98
4% of jobs
$39.98 - $42.67
0% of jobs
$42.67 - $45.36
3% of jobs
$15
$29
$45
How much do internship rfic design engineer jobs pay per hour?
As of Aug 8, 2026, the average hourly pay for internship rfic design engineer in San Jose, CA is $29.79, according to ZipRecruiter salary data. Most workers in this role earn between $24.23 and $33.80 per hour, depending on experience, location, and employer.
What is the difference between Internship Rfic Design Engineer vs RFIC Design Engineer?
| Aspect | Internship RFIC Design Engineer | RFIC Design Engineer |
|---|---|---|
| Qualifications | Enrolled in or recent graduate of electrical engineering or related field | Bachelor's or master's in electrical engineering, with specialized RFIC knowledge |
| Work Environment | Internship programs, entry-level projects, supervised tasks | Full-time professional role, independent project work, team collaboration |
| Responsibilities | Assisting in RFIC design tasks, learning industry tools, supporting senior engineers | Designing, testing, and optimizing RFICs for communication systems |
The main difference between an Internship RFIC Design Engineer and an RFIC Design Engineer lies in experience, responsibilities, and career stage. Internships are designed for students or recent graduates gaining industry exposure, while RFIC Design Engineers are experienced professionals responsible for full project execution.
What are the most commonly searched types of Rfic Design Engineer jobs in San Jose, CA? The most popular types of Rfic Design Engineer jobs in San Jose, CA are:
What are popular job titles related to Internship Rfic Design Engineer jobs in San Jose, CA? For Internship Rfic Design Engineer jobs in San Jose, CA, the most frequently searched job titles are:
- Chemical Engineering Internship
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What job categories do people searching Internship Rfic Design Engineer jobs in San Jose, CA look for? The top searched job categories for Internship Rfic Design Engineer jobs in San Jose, CA are:
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What cities near San Jose, CA are hiring for Internship Rfic Design Engineer jobs? Cities near San Jose, CA with the most Internship Rfic Design Engineer job openings:
Full-time
This job post has expired today. Applications are no longer accepted.
Job description
Job Title: RF Validation Engineer (High Priority)
Location: Sunnyvale, CA
Client: Meta
JD:
Work with RF lead, deliver cellular RF design for specific RF subsystems.
• Plan and execute cellular RF validation, determine RF performance and generate reports.
• Execute RF matching tuning, verify RF performance during the tuning.
• Investigate and debug test setup and performance issues. Verify fixes and improvements, produce status reports and test reports.
• Involved in multi-functional engineering discussions for design and validation, drive the discussions for owned workstreams towards delivery.
Skills and Experience required for the Work
• Experience/knowledge of RF design and validation with cellular radio technologies: LTE or 5G.
• Familiar with RF circuit design including PCB layout methodologies and guidelines.
• Working knowledge of general purpose RF test equipment, such as cellular call box, spectrum analyzer, network analyzer etc.
• Understanding key cellular RF parametrics and 3GPP requirements, and is able to plan and perform the test.
• Experience/knowledge of RF matching tuning, smith chart and S-parameter.
• Good hands-on skills on rework such as soldering, mock-up, on small PCB and device.
• Work in a dynamic, fast paced, high-octane environment.
• Good written and oral communication skills.
• Willingness to travel to overseas manufacturing facilities to support builds. 10~15% of the time.
Preferred Skills and Experience for the Work
• Able to write test scripts by using Python or other tools.
• RF validation experience on other radio technologies : GPS, Wifi/BT, etc.
• Knowledge of electromagnetic simulations and experience in RFIC design.
Location: Sunnyvale, CA
Client: Meta
JD:
Work with RF lead, deliver cellular RF design for specific RF subsystems.
• Plan and execute cellular RF validation, determine RF performance and generate reports.
• Execute RF matching tuning, verify RF performance during the tuning.
• Investigate and debug test setup and performance issues. Verify fixes and improvements, produce status reports and test reports.
• Involved in multi-functional engineering discussions for design and validation, drive the discussions for owned workstreams towards delivery.
Skills and Experience required for the Work
• Experience/knowledge of RF design and validation with cellular radio technologies: LTE or 5G.
• Familiar with RF circuit design including PCB layout methodologies and guidelines.
• Working knowledge of general purpose RF test equipment, such as cellular call box, spectrum analyzer, network analyzer etc.
• Understanding key cellular RF parametrics and 3GPP requirements, and is able to plan and perform the test.
• Experience/knowledge of RF matching tuning, smith chart and S-parameter.
• Good hands-on skills on rework such as soldering, mock-up, on small PCB and device.
• Work in a dynamic, fast paced, high-octane environment.
• Good written and oral communication skills.
• Willingness to travel to overseas manufacturing facilities to support builds. 10~15% of the time.
Preferred Skills and Experience for the Work
• Able to write test scripts by using Python or other tools.
• RF validation experience on other radio technologies : GPS, Wifi/BT, etc.
• Knowledge of electromagnetic simulations and experience in RFIC design.
About Xforia
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