... tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure ... Your successful track record of mentoring junior engineers and interns a huge plus. A strong ...
... tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure ... Your successful track record of mentoring junior engineers and interns a huge plus. A strong ...
... tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure ... Your successful track record of mentoring junior engineers and interns a huge plus. * A strong ...
... tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure ... Your successful track record of mentoring junior engineers and interns a huge plus. * A strong ...
... tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure ... Your successful track record of mentoring junior engineers and interns a huge plus. * A strong ...
... tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure ... Your successful track record of mentoring junior engineers and interns a huge plus. * A strong ...
... tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure ... Your successful track record of mentoring junior engineers and interns a huge plus. * A strong ...
... tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure ... Your successful track record of mentoring junior engineers and interns a huge plus. * A strong ...
... tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure ... Your successful track record of mentoring junior engineers and interns a huge plus. A strong ...
... tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure ... Your successful track record of mentoring junior engineers and interns a huge plus. A strong ...
Lab Intern
Saratoga, CA · On-site
$16.50 - $22/hr
... world's leading micro-LED company). The company is in execution mode and has a world-class ... Configure switches and support basic Layer 2/LAN networking tasks. * Maintain lab organization ...
Lab Intern
Saratoga, CA · On-site
$16.50 - $22/hr
... world's leading micro-LED company). The company is in execution mode and has a world-class ... Configure switches and support basic Layer 2/LAN networking tasks. * Maintain lab organization ...
Lab Intern
Saratoga, CA · On-site
$16.50 - $22/hr
... world's leading micro-LED company). The company is in execution mode and has a world-class ... Configure switches and support basic Layer 2/LAN networking tasks. * Maintain lab organization ...
Lab Intern
Saratoga, CA · On-site
$16.50 - $22/hr
... world's leading micro-LED company). The company is in execution mode and has a world-class ... Configure switches and support basic Layer 2/LAN networking tasks. * Maintain lab organization ...
Senior Staff Engineer, Firmware Engineering
Santa Clara, CA · On-site
$140K - $185K/yr
Stay current with industry trends and emerging technologies Example Tasks * Mentor interns or new ... Understanding of embedded SoC and micro-controller architecture, memory-mapped hardware interfaces ...
Senior Staff Engineer, Firmware Engineering
Santa Clara, CA · On-site
$140K - $185K/yr
Stay current with industry trends and emerging technologies Example Tasks * Mentor interns or new ... Understanding of embedded SoC and micro-controller architecture, memory-mapped hardware interfaces ...
Senior Staff Engineer, Firmware Engineering
Santa Clara, CA · On-site
$141K - $186K/yr
Stay current with industry trends and emerging technologies Example Tasks * Mentor interns or new ... Understanding of embedded SoC and micro-controller architecture, memory-mapped hardware interfaces ...
Senior Staff Engineer, Firmware Engineering
Santa Clara, CA · On-site
$141K - $186K/yr
Stay current with industry trends and emerging technologies Example Tasks * Mentor interns or new ... Understanding of embedded SoC and micro-controller architecture, memory-mapped hardware interfaces ...
Senior Staff Engineer, Firmware Engineering
Santa Clara, CA · On-site
$140K - $185K/yr
Stay current with industry trends and emerging technologies Example Tasks * Mentor interns or new ... Understanding of embedded SoC and micro-controller architecture, memory-mapped hardware interfaces ...
Senior Staff Engineer, Firmware Engineering
Santa Clara, CA · On-site
$140K - $185K/yr
Stay current with industry trends and emerging technologies Example Tasks * Mentor interns or new ... Understanding of embedded SoC and micro-controller architecture, memory-mapped hardware interfaces ...
Staff Software Engineer - HYBRID
Palo Alto, CA · On-site
$110K - $230K/yr
Understanding of micro-services oriented architecture and extensible REST APIs * Understanding of ... Knowledge of developer tooling across the software development life cycle (task management, source ...
Staff Software Engineer - HYBRID
Palo Alto, CA · On-site
$110K - $230K/yr
Understanding of micro-services oriented architecture and extensible REST APIs * Understanding of ... Knowledge of developer tooling across the software development life cycle (task management, source ...
Senior Software Engineer (AI Products) - HYBRID
Palo Alto, CA · On-site
$100K - $215K/yr
Understanding of micro-services oriented architecture and extensible REST APIs * Understanding of ... Knowledge of developer tooling across the software development life cycle (task management, source ...
Senior Software Engineer (AI Products) - HYBRID
Palo Alto, CA · On-site
$100K - $215K/yr
Understanding of micro-services oriented architecture and extensible REST APIs * Understanding of ... Knowledge of developer tooling across the software development life cycle (task management, source ...
Director, SOC Design
Santa Clara, CA · On-site
Define the system architecture, micro-architecture and register specification for highly complex ... Work with the verification team on pre-silicon verification tasks such as reviewing the ...
Director, SOC Design
Santa Clara, CA · On-site
Define the system architecture, micro-architecture and register specification for highly complex ... Work with the verification team on pre-silicon verification tasks such as reviewing the ...
Field Applications Engineer
San Jose, CA · On-site
$85K - $120K/yr
... internship or academic project experience plus) • Basic understanding of x86 and ARM ... small tasks and projects in a fast-paced environment EEO Statement $85,000 - $120,000 The salary ...
Field Applications Engineer
San Jose, CA · On-site
$85K - $120K/yr
... internship or academic project experience plus) • Basic understanding of x86 and ARM ... small tasks and projects in a fast-paced environment EEO Statement $85,000 - $120,000 The salary ...
Staff Software Engineer - HYBRID
Palo Alto, CA · On-site
$110K - $230K/yr
Understanding of micro-services oriented architecture and extensible REST APIs * Understanding of ... Knowledge of developer tooling across the software development life cycle (task management, source ...
Staff Software Engineer - HYBRID
Palo Alto, CA · On-site
$110K - $230K/yr
Understanding of micro-services oriented architecture and extensible REST APIs * Understanding of ... Knowledge of developer tooling across the software development life cycle (task management, source ...
Director, SOC Design
Santa Clara, CA · On-site
Define the system architecture, micro-architecture and register specification for highly complex ... Work with the verification team on pre-silicon verification tasks such as reviewing the ...
Director, SOC Design
Santa Clara, CA · On-site
Define the system architecture, micro-architecture and register specification for highly complex ... Work with the verification team on pre-silicon verification tasks such as reviewing the ...
Field Applications Engineer
San Jose, CA · On-site
$85K - $120K/yr
... internship or academic project experience plus) • Basic understanding of x86 and ARM ... small tasks and projects in a fast-paced environment Salary Range $85,000 - $120,000 The salary ...
Field Applications Engineer
San Jose, CA · On-site
$85K - $120K/yr
... internship or academic project experience plus) • Basic understanding of x86 and ARM ... small tasks and projects in a fast-paced environment Salary Range $85,000 - $120,000 The salary ...
Field Applications Engineer
San Jose, CA · On-site
$85K - $120K/yr
... internship or academic project experience plus) • Basic understanding of data center architecture ... small tasks and projects in a fast-paced environment • Individual must be able to work ...
Field Applications Engineer
San Jose, CA · On-site
$85K - $120K/yr
... internship or academic project experience plus) • Basic understanding of data center architecture ... small tasks and projects in a fast-paced environment • Individual must be able to work ...
Senior Software Engineer - Authentication
San Francisco, CA · On-site
$158K - $237K/yr
... micro-services. As a member of the Accounts team, you will help build and shape new improved ... Break down complex problems into manageable tasks, ensuring steady and predictable delivery while ...
Senior Software Engineer - Authentication
San Francisco, CA · On-site
$158K - $237K/yr
... micro-services. As a member of the Accounts team, you will help build and shape new improved ... Break down complex problems into manageable tasks, ensuring steady and predictable delivery while ...
2027 Undergrad Software Test Engineering Intern/Co-Op
San Jose, CA · On-site
$66K/yr
Summer Internship: * Semester Schools: May 24, 2027 - August 13, 2027 * Quarter Schools: June 21 ... We will assign you tasks for reproduction, trouble shooting, and triaging of software defects ...
2027 Undergrad Software Test Engineering Intern/Co-Op
San Jose, CA · On-site
$66K/yr
Summer Internship: * Semester Schools: May 24, 2027 - August 13, 2027 * Quarter Schools: June 21 ... We will assign you tasks for reproduction, trouble shooting, and triaging of software defects ...
Internship Micro Task information
What is the difference between Internship Micro Task vs Data Entry Clerk?
| Aspect | Internship Micro Task | Data Entry Clerk |
|---|---|---|
| Required Credentials | Minimal; often students or entry-level | High school diploma or equivalent; some roles may require basic computer skills |
| Work Environment | Online platforms, flexible hours, short tasks | Office or remote, consistent work hours |
| Employer & Industry Usage | Freelance platforms, gig economy, internships | Businesses, administrative departments, data management |
| Common Search & Comparison Intent | Understanding entry-level or gig work options | Looking for regular data entry jobs or administrative roles |
Internship Micro Tasks are typically short, flexible online assignments suitable for students or beginners, often used for gaining experience or earning extra income. Data Entry Clerks perform more regular, ongoing data input work within organizations, requiring basic computer skills and sometimes formal training. While both involve data handling, internships focus on learning and flexibility, whereas data entry roles emphasize consistency and accuracy.
What are the most commonly searched types of Micro Task jobs in California?
The most popular types of Micro Task jobs in California are:
What cities in California are hiring for Internship Micro Task jobs?
Cities in California with the most Internship Micro Task job openings:
Full-time
Re-posted 19 days ago
Nvidia rating
9.6
Based on 18 frontline employees who took The Breakroom Quiz
6th of 247 rated software companies
Job description
We are now looking for a Senior Logic Design Engineer. As a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and off-chip interconnect network, MP coherency and last-level and system caches, focusing on such tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure, supporting verification and implementation. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.
We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. What you'll be doing: As a member of our core CPU team, you'll own and be responsible for crafting and timely delivery of a specific unit on the chip. Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing closure, and design documentation.
Collaborate with our verification team to verify the correctness of your unit. Work with implementation to achieve your timing, area, performance and power goals. Assist with timing closure of super units.
What we need to see: Master's Degree in Electrical Engineering, Computer Engineering or Computer Science or equivalent experience. 5+ years of experience in processor or other related high performance semiconductor designs. Verilog expertise required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
Strong communication and interpersonal skills are required along with the work in a dynamic, global team. Your successful track record of mentoring junior engineers and interns a huge plus. A strong background in computer architecture, cache coherency or high speed interconnects is helpful NVIDIA is widely considered to be one of the technology world's most desirable employers.
We have some of the most brilliant and hardworking people in the world working for us. Are you creative and autonomous and love the challenge of crafting the fastest and most power efficient chips in their class. If so, we want to hear from you.
#LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until March 22, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US