San Jose, CA · On-site
$150 - $350/hr
Role Overview We are seeking a highly capable Formal Verification Engineer to join our core product and research team. In this role, you will work closely with our AI engineering, research, and EDA ...
San Jose, CA · On-site
$150 - $350/hr
Role Overview We are seeking a highly capable Formal Verification Engineer to join our core product and research team. In this role, you will work closely with our AI engineering, research, and EDA ...
San Jose, CA · On-site
$159K/yr
Formal Verification Engineer Location: San Jose, CA - Full Time We are looking for formal verification experts to ensure design correctness using mathematical verification techniques and advanced ...
San Jose, CA · On-site
$159K/yr
Formal Verification Engineer Location: San Jose, CA - Full Time We are looking for formal verification experts to ensure design correctness using mathematical verification techniques and advanced ...
San Jose, CA · On-site
$350K/yr
Role Overview We are seeking a highly capable Formal Verification Engineer to join our core product and research team. In this role, you will work closely with our AI engineering, research, and EDA ...
San Jose, CA · On-site
$350K/yr
Role Overview We are seeking a highly capable Formal Verification Engineer to join our core product and research team. In this role, you will work closely with our AI engineering, research, and EDA ...
Palo Alto, CA · On-site
$150 - $210/hr
About the Role We are seeking a Formal Verification Engineer to verify production hardware and software with Aristotle, our formal reasoning agent. In this role, you will work with customers to scope ...
Palo Alto, CA · On-site
$150 - $210/hr
About the Role We are seeking a Formal Verification Engineer to verify production hardware and software with Aristotle, our formal reasoning agent. In this role, you will work with customers to scope ...
Palo Alto, CA · On-site
$180 - $230/hr
About the Role We are seeking a Formal Verification Engineer to verify production hardware and software with Aristotle, our formal reasoning agent. In this role, you will work with customers to scope ...
Palo Alto, CA · On-site
$180 - $230/hr
About the Role We are seeking a Formal Verification Engineer to verify production hardware and software with Aristotle, our formal reasoning agent. In this role, you will work with customers to scope ...
Santa Clara, CA · On-site
$159K/yr
As a Formal Verification Engineer, you will play a key role in ensuring the functional correctness and completeness of our next generation chip designs. You will collaborate with a team of highly ...
Santa Clara, CA · On-site
$159K/yr
As a Formal Verification Engineer, you will play a key role in ensuring the functional correctness and completeness of our next generation chip designs. You will collaborate with a team of highly ...
Santa Clara, CA · Hybrid
$159K/yr
NVIDIA is looking for Formal Verification Engineer to help verify the design and implementation of industry's leading Coherent interconnects and other High-PerformanceDesigns. As a Formal ...
Santa Clara, CA · Hybrid
$159K/yr
NVIDIA is looking for Formal Verification Engineer to help verify the design and implementation of industry's leading Coherent interconnects and other High-PerformanceDesigns. As a Formal ...
Mountain View, CA · On-site
$160 - $600/hr
We are seeking a Formal Verification Engineer to bring rigorous mathematical guarantees to our hardware and software at every layer of the stack. What You'll Do Here * Apply model checking and formal ...
Mountain View, CA · On-site
$160 - $600/hr
We are seeking a Formal Verification Engineer to bring rigorous mathematical guarantees to our hardware and software at every layer of the stack. What You'll Do Here * Apply model checking and formal ...
Palo Alto, CA · On-site
$159K/yr
About this Role In this role, you'll build formal proofs of design correctness using model checking, property verification, and equivalence analysis. You'll collaborate closely with RTL, verification ...
Quick apply
Palo Alto, CA · On-site
$159K/yr
About this Role In this role, you'll build formal proofs of design correctness using model checking, property verification, and equivalence analysis. You'll collaborate closely with RTL, verification ...
... Formal Verification is a must Qualifications Experience in functional verification EDA tools: VCS, IUS, ModelSim, Jasper, 0-in, IFV, OneSpin, SLEC, etc is highly desired - Familiar with programming ...
... Formal Verification is a must Qualifications Experience in functional verification EDA tools: VCS, IUS, ModelSim, Jasper, 0-in, IFV, OneSpin, SLEC, etc is highly desired - Familiar with programming ...
Palo Alto, CA · On-site
$159K/yr
About this Role In this role, you'll build formal proofs of design correctness using model checking, property verification, and equivalence analysis. You'll collaborate closely with RTL, verification ...
Palo Alto, CA · On-site
$159K/yr
About this Role In this role, you'll build formal proofs of design correctness using model checking, property verification, and equivalence analysis. You'll collaborate closely with RTL, verification ...
Mountain View, CA · On-site +1
$150K - $287K/yr
We are seeking a Formal Verification Engineer to bring rigorous mathematical guarantees to our hardware and software at every layer of the stack. What You'll Do Here * Apply model checking and formal ...
Mountain View, CA · On-site +1
$150K - $287K/yr
We are seeking a Formal Verification Engineer to bring rigorous mathematical guarantees to our hardware and software at every layer of the stack. What You'll Do Here * Apply model checking and formal ...
Santa Clara, CA · On-site
$200 - $500/hr
Role Overview We are looking for a talented Senior Formal Verification Engineer to define, own, and scale the formal verification effort that hardens Velaura's next-generation Physical AI SoC. You ...
Santa Clara, CA · On-site
$200 - $500/hr
Role Overview We are looking for a talented Senior Formal Verification Engineer to define, own, and scale the formal verification effort that hardens Velaura's next-generation Physical AI SoC. You ...
Santa Clara, CA · On-site
$159K/yr
... CPU Engineering General Summary: Are you interested in working with a world-class CPU design team? Are you interested in the application of formal methods to the verification of application ...
Santa Clara, CA · On-site
$159K/yr
... CPU Engineering General Summary: Are you interested in working with a world-class CPU design team? Are you interested in the application of formal methods to the verification of application ...
Santa Clara, CA · On-site
$142 - $213/hr
... Engineering Group > CPU EngineeringGeneral Summary:Are you interested in working with a world-class CPU design team? Are you interested in the application of formal methods to the verification of ...
Santa Clara, CA · On-site
$142 - $213/hr
... Engineering Group > CPU EngineeringGeneral Summary:Are you interested in working with a world-class CPU design team? Are you interested in the application of formal methods to the verification of ...
Mountain View, CA · Hybrid
$123K - $169K/yr
This role follows a hybrid work schedule and you will report to a Silicon Engineering Lead. You will: * Define and drive formal strategy for first-pass silicon success. Own the formal verification ...
Mountain View, CA · Hybrid
$123K - $169K/yr
This role follows a hybrid work schedule and you will report to a Silicon Engineering Lead. You will: * Define and drive formal strategy for first-pass silicon success. Own the formal verification ...
$122K - $168K/yr
As a Formal Verification Engineer at NVIDIA, you will verify the build and implementation of the industry's leading GPUs. In this position, your responsibilities will be to verify the micro ...
$122K - $168K/yr
As a Formal Verification Engineer at NVIDIA, you will verify the build and implementation of the industry's leading GPUs. In this position, your responsibilities will be to verify the micro ...
Experience with SystemVerilog Assertions (SVA) and formal verification methods. Preferred qualifications: * Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science ...
Experience with SystemVerilog Assertions (SVA) and formal verification methods. Preferred qualifications: * Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science ...
Santa Clara, CA · On-site
$122K - $168K/yr
As a Formal Verification Engineer at NVIDIA, you will verify the build and implementation of the industry's leading GPUs. In this position, your responsibilities will be to verify the micro ...
Santa Clara, CA · On-site
$122K - $168K/yr
As a Formal Verification Engineer at NVIDIA, you will verify the build and implementation of the industry's leading GPUs. In this position, your responsibilities will be to verify the micro ...
Santa Clara, CA · On-site
$122K - $168K/yr
As a Formal Verification Engineer at NVIDIA, you will verify the build and implementation of the industry's leading GPUs. In this position, your responsibilities will be to verify the micro ...
Santa Clara, CA · On-site
$122K - $168K/yr
As a Formal Verification Engineer at NVIDIA, you will verify the build and implementation of the industry's leading GPUs. In this position, your responsibilities will be to verify the micro ...
| Aspect | Internship Formal Verification Engineer | Formal Verification Engineer |
|---|---|---|
| Qualifications | Enrolled in or recent graduate in Computer Engineering, Electrical Engineering, or related fields | Bachelor's or Master's in Electrical Engineering, Computer Science, or related fields; certifications are a plus |
| Work Environment | Internship programs, entry-level tasks, supervised projects | Full-time professional role, independent project work, team collaboration |
| Industry Usage | Common in semiconductor, electronics, and hardware companies for training | Established role in hardware design, verification teams, and chip development |
The main difference is that an Internship Formal Verification Engineer is a training position for students or recent graduates gaining initial experience, while a Formal Verification Engineer is a full-time professional responsible for verifying hardware designs independently. Interns focus on learning and assisting, whereas full engineers lead verification processes.
The most popular types of Formal Verification Engineer jobs in California are:
For Internship Formal Verification Engineer jobs in California, the most frequently searched job titles are:
The top searched job categories for Internship Formal Verification Engineer jobs in California are:
Cities in California with the most Internship Formal Verification Engineer job openings:
$150 - $350/hr
Other
Medical, Dental, Vision, Retirement, PTO
Re-posted 10 days ago
ChipAgents is revolutionizing chip design and verification with agentic-AI workflows. Founded by experts in AI and semiconductor design, we partner with top-10 semiconductor companies, hyperscale cloud providers, and cutting-edge startups. Our platform accelerates RTL development, functional verification, and simulation—unlocking new levels of productivity and design quality.
Role OverviewWe are seeking a highly capable Formal Verification Engineer to join our core product and research team. In this role, you will work closely with our AI engineering, research, and EDA teams to build advanced agentic AI systems for semiconductor verification.
Your expertise in formal methods, property specification, assertion-based verification, and proof debugging will help shape how AI systems reason about complex hardware behavior. You will play a central role in teaching our AI agents how verification engineers develop properties, analyze counterexamples, close proof convergence gaps, and validate RTL designs with mathematical rigor.
This is a unique opportunity to apply deep formal verification expertise at the frontier of AI-assisted chip design.
Collaborate with AI engineers and researchers to model and codify formal verification workflows.
Develop, refine, and debug SystemVerilog Assertions, formal properties, assumptions, constraints, and coverage objectives.
Use formal verification tools to analyze RTL designs, prove design correctness, and identify functional bugs.
Create reusable formal verification examples, design patterns, proof strategies, and edge cases to train and evaluate AI agents.
Help AI systems interpret design specifications, generate properties, reason about RTL behavior, and debug counterexamples.
Support benchmarking and evaluation of AI-assisted formal verification productivity across realistic IP and SoC verification tasks.
Work closely with customers, product, and research teams to translate formal verification pain points into automated AI workflows.
Contribute to methodology development for assertion-based verification, formal apps, equivalence checking, connectivity checking, and coverage closure.
Strong expertise in formal verification methodologies and signoff flows.
Hands-on experience with JasperGold, VC Formal, Questa Formal, or equivalent tools.
Deep knowledge of SystemVerilog Assertions (SVA) and assertion-based verification.
Experience proving complex properties, debugging counterexamples, and achieving formal closure.
Familiarity with SAT/SMT-based reasoning and formal verification fundamentals.
Experience with CDC, RDC, lint, and static verification methodologies.
Strong RTL design and microarchitecture understanding.
Experience verifying production IPs, subsystems, or SoCs.
Proficiency in Python, Tcl, or scripting for verification automation.
Interest in applying AI/LLMs to hardware design and verification workflows
Work at the frontier of AI and semiconductor design.
Collaborate with a world-class team spanning AI, systems, and EDA.
Shape a foundational shift in how chips are built.
$150K/yr – $350K/yr + Offers Equity. We are open to discuss above-scale compensation with exceptional candidates on a case-by-case basis.
Unlimited PTO and full benefits (medical, vision, dental, 401k).
Two engineering-centric offices with free parking, private gym, and free lunch, drinks and snacks.
