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Internship Asic Rtl Design Engineer Jobs in Washington, DC

FPGA Hardware Design Engineer

Hanover, MD · On-site

$122K - $168K/yr

Apply ASIC or FPGA place and route (P&R) tools with various libraries to create physical ... Direct and check the work of other hardware design engineers * Act as internal consultant providing ...

Showing results 21-40

Internship Asic Rtl Design Engineer information

See Washington, DC salary details

$106.5K

$170.1K

$228.8K

How much do internship asic rtl design engineer jobs pay per year?

As of Aug 9, 2026, the average yearly pay for internship asic rtl design engineer in Washington, DC is $170,111.00, according to ZipRecruiter salary data. Most workers in this role earn between $148,900.00 and $203,900.00 per year, depending on experience, location, and employer.

What does an internship ASIC RTL design engineer do?

As an ASIC RTL Design Engineering intern, you'll typically work on tasks such as writing and verifying RTL code using languages like Verilog or VHDL, assisting with simulation and debugging, and collaborating closely with senior engineers on real design blocks. Interns often participate in design reviews, update documentation, and may get hands-on experience with synthesis and timing analysis tools. This role is highly collaborative and provides exposure to the complete ASIC development cycle, making it an excellent opportunity to build foundational skills and gain insight into industry-standard methodologies.

What are the key skills and qualifications needed to thrive as an internship ASIC RTL design engineer?

To thrive as an Internship ASIC RTL Design Engineer, you need a solid understanding of digital logic design, computer architecture, and proficiency in HDL languages like Verilog or VHDL, typically supported by coursework in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, and simulation environments is highly valuable. Strong analytical thinking, attention to detail, and effective communication skills help interns collaborate with teams and learn quickly in a fast-paced environment. These skills and qualities are essential for contributing to complex chip design projects and ensuring accuracy and efficiency in RTL development.

What is an internship ASIC RTL design engineer?

An Internship ASIC RTL (Register Transfer Level) Design Engineer is a student or recent graduate who assists in designing and developing digital integrated circuits (ICs) using hardware description languages like Verilog or VHDL. They work under the guidance of senior engineers to create, simulate, and verify RTL code for ASIC (Application Specific Integrated Circuit) projects. The role provides hands-on experience with the chip design process, including synthesis, timing analysis, and verification. Interns gain valuable exposure to industry-standard tools and methodologies, helping them prepare for a full-time engineering career.

What is the difference between Internship Asic Rtl Design Engineer vs Asic Verification Engineer?

AspectInternship Asic Rtl Design EngineerAsic Verification Engineer
CredentialsTypically pursuing or recently completed a degree in Electrical Engineering or Computer EngineeringSimilar educational background, often with additional coursework in verification methodologies
Work EnvironmentInternship setting, supervised, focused on learning and assisting in RTL design tasksFull-time role, focused on testing and verifying RTL designs
Industry UsageUsed in semiconductor and chip design companies during early career stagesCommon in companies developing complex integrated circuits and chips

The Internship Asic Rtl Design Engineer focuses on assisting in RTL design tasks during an internship, emphasizing learning and support. In contrast, the Asic Verification Engineer is responsible for verifying RTL designs to ensure functionality. Both roles require similar educational backgrounds but differ in responsibilities and work environment, with verification roles being more advanced and permanent.

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Associate ASIC and/or FPGA Design and Verification Engineer

Boeing

Fairfax, VA

$125K - $173K/yr

Full-time

Medical, Life, Retirement

Posted 2 days ago

New


Boeing rating

8.5

Company rating: 8.5 out of 10

Based on 612 frontline employees who took The Breakroom Quiz

31st of 537 rated manufacturers


Job description

Associate ASIC and/or FPGA Design and Verification Engineer

Company:

Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers to join us as part of our Boeing Electronic Products team at the heart of Boeing's products in either El Segundo or Huntington Beach, CA. An alternative location that may become available based on program needs could be Fairfax, VA.

From complex digitally beamformed phased arrays for constellation satellite programs to computing and networking equipment for commercial airplanes, the Boeing Electronic Products group develops ASICs and FPGAs that are at the heart of Boeing's products!

We leverage leading-edge technology and work with world-class partners to provide some of the most complex SoCs in the world. We develop robust, high-performance custom processors using the latest ARM IP to enable high-integrity, low SWAP-C flight computers. We apply the latest digital IC design processes with industry-best tools to enable applications which cut across every domain.

Our diverse development portfolio provides opportunities to learn with exposure to the breadth of the Boeing product line - approximately half our design work is within the Space & Launch business unit, and half is from other parts of Boeing (AvionX; Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems).

As an ASIC/FPGA Engineer on the Boeing Electronic Products team you will develop state-of-the-art digital ICs/SoCs to support the most critical programs across the enterprise. We're hiring design and verification engineers at the entry and associate levels to support new and existing projects. We collaborate with other electronics groups across the company and around the world and support ASIC/FPGA design and verification for electronics that we build in El Segundo or various other Boeing sites.

Position Responsibilities may include:

  • Develop FPGA/ASIC designs supporting design and/or verification teams

  • Implement FPGA/ASIC with latest design practices and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs)

  • Integrate DSP IP from Boeing's algorithm team and third-party IP as needed

  • Perform static timing analysis, LEC, CDC, linting, and other necessary checks to ensure the design is completed on schedule

  • Develop Functional Coverage Models and perform Code Coverage to verify designs in simulation

  • Create self-checking and reusable test benches from scratch, applying Object Oriented Programming concepts such as Inheritance and Polymorphism, and leverage UVM to build agents consisting of drivers, sequencers, monitors, and use of predictors together with scoreboards for checking correctness.

  • Support FPGA-based prototyping and validation depending on program and system requirements and complexity

  • Validate design through hardware integration test with special test equipment, test-beds, and higher-level systems as needed

This position is expected to be 100% onsite. The selected candidate will be required to work onsite at one of the listed location options.

This position requires the ability to obtain a US Security Clearance for which the US Government requires US Citizenship as a condition of employment. An interim and/or final U.S. Secret Clearance Post-Start is required.

Basic Qualifications (Required Skills/Experience):

  • Bachelor of Science degree in Engineering (with a focus in Electrical, Mechanical or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent qualifications directly related to the work statement

  • Experience with ASIC/FPGA design or verification

  • Experience with ASIC/FPGA architectural definition, and detailed design implementation and functional verification using SystemVerilog with delivery/release of production designs

  • Experience with hardware-based integration and test of ASIC/FPGA designs

Preferred Qualifications (Desired Skills/Experience):

  • Master's Degree in EE, Computer Engineering/Science, or related field, or equivalent experience

  • Experience with hardware emulators, especially Palladium

  • Proficiency with hardware verification languages: System Verilog, System Verilog Assertions

  • Ability to executable test plans

  • Proficiency with Object Oriented Programming Concepts: Inheritance, Polymorphism, etc.

  • Ability to create self-checking and reusable testbenches from scratch

  • Experience developing Functional Coverage Models and Closing Code Coverage

  • Experience with high-speed Serdes interfaces (JESD204C, PCIe, Ethernet)

  • Proficient in scripting languages: Make, Perl, Python, etc.

  • Revision Control Systems: svn, cvs, git

  • Proficient in Linux Environments

  • Familiarity with space-based design techniques and radiation mitigation

  • Demonstrated history of 1st pass success with ASIC designs

Conflict of Interest:

Successful candidate for this job must satisfy the Company's Conflict of Interest (COI) assessment process.

Typical Education/Experience:

Associate:

Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g. Bachelor) and typically 2 or more years' related work experience or an equivalent combination of technical education and experience (e.g. Master). In the USA, ABET accreditation is the preferred, although not required, accreditation standard.

Relocation:

This position offers relocation based on candidate eligibility. Note: Basic relocation will be offered for eligible internal candidates.

Drug Free Workplace:

Boeingis a Drug Free Workplace where post offer applicants and employees are subject to testing for marijuana, cocaine, opioids, amphetamines, PCP, and alcohol when criteria is met as outlined in our policies.

Shift Work Statement:

This position is for 1st shift.

At Boeing, we strive to deliver a Total Rewards package that will attract, engage and retain the top talent. Elements of the Total Rewards package include competitive base pay and variable compensation opportunities.

The Boeing Company also provides eligible employees with an opportunity to enroll in a variety of benefit programs, generally including health insurance, flexible spending accounts, health savings accounts, retirement savings plans, life and disability insurance programs, and a number of programs that provide for both paid and unpaid time away from work.

The specific programs and options available to any given employee may vary depending on eligibility factors such as geographic location, date of hire, and the applicability of collective bargaining agreements.

Pay is based upon candidate experience and qualifications, as well as market and business considerations.

Summary pay range for Associate, (Level 2): $98,600 - $133,400

Language Requirements:

Not Applicable

Education:

Bachelor's Degree or Equivalent

Relocation:

This position offers relocation based on candidate eligibility.

Export Control Requirement:

Safety Sensitive:

Security Clearance:

This position requires the ability to obtain a U.S. Security Clearance for which the U.S. Government requires U.S. Citizenship. An interim and/or final U.S. Secret Clearance Post-Start is required.

Visa Sponsorship:

Employer will not sponsor applicants for employment visa status.

Contingent Upon Award Program

This position is not contingent upon program award

Shift:

Shift 1 (United States of America)

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Boeing is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military/veteran status or other characteristics protected by law.

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