... engineers to ensure our designs meet real-world performance demands ... This is a hands-on role that spans simulation, emulation, debug, and analysis. This role is on-site ...
... engineers to ensure our designs meet real-world performance demands ... This is a hands-on role that spans simulation, emulation, debug, and analysis. This role is on-site ...
CPU Core Performance Verification Intern - CPU/AI Hardware
Austin, TX · On-site
$50 - $70/hr
... engineers to ensure our designs meet real-world performance demands ... This is a hands-on role that spans simulation, emulation, debug, and analysis. This role is on-site ...
CPU Core Performance Verification Intern - CPU/AI Hardware
Austin, TX · On-site
$50 - $70/hr
... engineers to ensure our designs meet real-world performance demands ... This is a hands-on role that spans simulation, emulation, debug, and analysis. This role is on-site ...
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$50 - $70/hr
Full-time, Internship
Re-posted 29 days ago
Job description
Join the team building high-performance RISC-V CPU cores at Tenstorrent. As a Performance Verification Intern, you will work alongside CPU architects, micro-architects, and performance engineers to ensure our designs meet real-world performance demands. This is a hands-on role that spans simulation, emulation, debug, and analysis.
This role is on-site, full-time (40 hours/week) in Santa Clara, CA or Austin, TX.
- Pursuing a BS, MS, or PhD in EE, ECE, CE, or CS with strong academic performance.
- Experienced with assembly, C/C++, and scripting in Python or Perl.
- Familiar with CPU architecture and performance concepts, including pipelines, memory systems, and branch prediction.
- Comfortable working through complex debug problems in a methodical, detail-oriented way.
- Interns who can create performance test plans and write stimulus to stress real CPU scenarios.
- Engineers who can run simulations and emulations to validate performance metrics.
- Contributors who can bring up and debug workloads ranging from open-source benchmarks to industry-standard suites.
- Teammates who can investigate mismatches between RTL and performance models and help root-cause bottlenecks.
- How CPU performance is measured, validated, and optimized before silicon.
- How performance models, RTL implementations, and debug tools come together in a real chip development workflow.
- Techniques for balancing tradeoffs in microarchitecture to hit performance targets.
- What it takes to collaborate across architecture, design, and post-silicon teams in a high-performance CPU project.
Compensation for all interns at Tenstorrent ranges from $50/hr - $70/hr including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.