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Intern Asic Design Engineer Jobs in Riverside, CA

Broadcom, Inc.

ASIC Verification Engineer

Irvine, CA · On-site

ASIC Verification Engineer High Speed Interconnect Product (HSIP) Group Broadcom is a global leader ... design specification. • Develop advanced verification environment and testbench components in ...

Broadcom

ASIC Verification Engineer

Irvine, CA

Logic design, Electronic circuit design and related courseworkto provide a broad background in the area of ASIC design and verification. Proficiency with HDL language such as Verilog, SystemVerilog ...

Broadcom

ASIC Design Verification Engineer

Irvine, CA

$129K - $207K/yr

We are looking for highly skilled and efficient Constrained Random Design Verification engineers that want to verify new designs that can evolve rapidly at every generation in a very dynamic market ...

Apple

Debug SoC Design Engineer

Irvine, CA · On-site

$146K - $178K/yr

... integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC ... This is a highly visible role, where you will be at the center of the ASIC debug efforts ...

Apple

Debug SoC Design Engineer

Irvine, CA · On-site

$146K - $178K/yr

Familiarity with the ASIC design flow. Knowledge of digital design, SoC architecture, and HDL languages like Verilog. Familiarity with design methodologies and industry standard EDA tools. Preferred ...

Marvell

Principal, IC Digital Design Engineer

Irvine, CA

$146K/yr

Implement and drive the full ASIC frontend design flow , including lint, CDC/RDC, synthesis, timing ... Engineering, Computer Engineering, or related field ; PhD is a plus. Preferred / Plus Skills

Broadcom Inc.

ASIC Design Verification Engineer

Irvine, CA · On-site

$91.20 - $152/hr

Overview Broadcom is seeking experienced Design Verification engineers to work on PCIe and host interface technologies. The role involves verifying new designs that evolve rapidly, using constrained ...

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All JobsIntern Asic Design Engineer JobsIntern Asic Design Engineer Jobs in Riverside, CA

Intern Asic Design Engineer information

See Riverside, CA salary details

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How much do intern asic design engineer jobs pay per hour?

As of Aug 10, 2026, the average hourly pay for intern asic design engineer in Riverside, CA is $20.22, according to ZipRecruiter salary data. Most workers in this role earn between $15.05 and $22.55 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an Intern ASIC Design Engineer, and why are they important?

To thrive as an Intern ASIC Design Engineer, you need a solid background in digital logic design, computer architecture, and a relevant degree in electrical or computer engineering. Familiarity with hardware description languages such as Verilog or VHDL, simulation tools, and EDA software is typically required. Strong analytical thinking, attention to detail, teamwork, and effective communication make an intern stand out in this role. These skills and qualities are crucial for designing reliable, high-performance integrated circuits and collaborating efficiently within engineering teams.

What does an Intern ASIC Design Engineer do?

An Intern ASIC Design Engineer assists in designing, developing, and verifying Application-Specific Integrated Circuits (ASICs) under the guidance of senior engineers. Their responsibilities often include working with hardware description languages like Verilog or VHDL, running simulations, debugging designs, and performing tests to ensure functionality and performance. Interns may also help with documentation, design reviews, and collaborating with cross-functional teams. This role provides hands-on experience in the semiconductor industry and helps build foundational skills for a career in hardware engineering.

What is the difference between Intern Asic Design Engineer vs Intern Digital Design Engineer?

AspectIntern Asic Design EngineerIntern Digital Design Engineer
CredentialsTypically pursuing or holding a degree in Electrical Engineering or Computer EngineeringTypically pursuing or holding a degree in Electrical Engineering or Computer Engineering
Work EnvironmentDesign teams focused on ASIC development, hardware design labs, collaborative projectsDigital circuit design, simulation, verification, and hardware testing environments
Industry UsageUsed in semiconductor companies, integrated circuit design firms, and hardware startupsCommon in semiconductor, electronics, and hardware development companies

Both roles involve working on digital hardware design, often requiring similar educational backgrounds. The main difference lies in the focus: Intern Asic Design Engineers work on the overall ASIC development process, while Intern Digital Design Engineers focus specifically on digital circuit design and verification. Both positions are essential in hardware development and often overlap in skills and work environment.

What types of projects and responsibilities can I expect as an Intern ASIC Design Engineer?

As an Intern ASIC Design Engineer, you can expect to work on a variety of tasks that support the design and verification of integrated circuits. Typical responsibilities include assisting with RTL coding, running simulations, analyzing test results, and documenting design processes. You'll often collaborate closely with senior engineers and cross-functional teams, gaining exposure to state-of-the-art tools and methodologies. This role provides a valuable learning environment where you're encouraged to ask questions, contribute to team discussions, and develop practical skills that are highly valued in the semiconductor industry.
What cities near Riverside, CA are hiring for Intern Asic Design Engineer jobs? Cities near Riverside, CA with the most Intern Asic Design Engineer job openings:
Intern Asic Design Engineer jobs near you
Infographic showing various Intern Asic Design Engineer job openings in Riverside, CA as of August 2026, with employment types broken down into 33% Internship, 34% Full Time, and 33% Part Time. Highlights an 100% In-person job distribution, with an average salary of $42,048 per year, or $20.2 per hour.

Sr. ASIC Design Verification Engineer (Silicon Engineering)

SpaceX

Irvine, CA • On-site

$165K - $260K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 20 days ago

SpaceX rating

8.8

Company rating: 8.8 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

15th of 72 rated aerospace companies

Job description

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING)
At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe.
We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.
RESPONSIBILITIES:
  • Responsible for digital ASIC verification at block and system level
  • Write and review test plans, develop test harnesses and test sequences
  • Responsible for test plan execution, running regressions, code and functional coverage closure
  • Contribute towards pre-silicon verification, chip bring-up and post-silicon validation
  • Be a hands-on self-starter who can execute the steps required to fully verify a complex digital designs

BASIC QUALIFICATIONS:
  • Bachelor's degree in electrical engineering or computer engineering
  • 5+ years of experience with design verification and test bench development

PREFERRED SKILLS AND EXPERIENCE:
  • Advanced degree in electrical engineering or computer engineering
  • Experience with verification methodologies such as UVM/OVM/VMM
  • Strong object-oriented programming knowledge
  • Strong problem-solving and coding skills
  • Experience in constrained random verification
  • Expertise in developing test plans, implementing coverage models, and analyzing results
  • Experience with scripting languages, e.g. Python for automation
  • RTL design, chip bring-up, and post-silicon validation experience
  • Ability to work in a dynamic environment with changing needs and requirements

ADDITIONAL REQUIREMENTS:
  • Ability to work extended hours and weekends as needed to meet critical milestones

COMPENSATION & BENEFITS:
Pay range:
Design Verification Engineer /Senior: $165,000.00 - $260,000.00/per year
Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.
Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation & will be eligible for 10 or more paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year.
ITAR REQUIREMENTS:
  • To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX's Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com.

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About SpaceX

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Industry

Aerospace product and parts manufacturing, data services, guided missile and space vehicle manufacturing and satellite telecommunications

Company size

1,001 - 5,000 Employees

Headquarters location

Hawthorne, CA, US

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