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Intern Asic Design Engineer Jobs in Riverside, CA

ASIC Design Engineer

Irvine, CA ยท On-site

$108K - $172.80K/yr

We are looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power ...

As an ASIC Design Engineer on the Starshield team, you will be working on advanced development programs in support of U.S. National Security. In this role, you will be developing cutting-edge next ...

ASIC Design Engineer

Irvine, CA ยท On-site

$108K - $172.80K/yr

We are looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power ...

ASIC Design Engineer

Irvine, CA

$127.10K - $203.40K/yr

We are looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power ...

ASIC Design Engineer

Irvine, CA ยท On-site

$127.10K - $203.40K/yr

We are looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power ...

We are looking for Digital Design Engineer for design and development of next generation image ... In depth hands-on experience in ASIC design flow: RTL coding, simulation, synthesis, static timing ...

Sr. Digital Design Engineer

Irvine, CA ยท On-site

$120.60K - $150K/yr

Description We are looking for Digital Design Engineer for design and development of next ... In depth hands-on experience in ASIC design flow: RTL coding, simulation, synthesis, static timing ...

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Intern Asic Design Engineer information

See Riverside, CA salary details

$9

$20

$38

How much do intern asic design engineer jobs pay per hour?

As of May 29, 2026, the average hourly pay for intern asic design engineer in Riverside, CA is $20.22, according to ZipRecruiter salary data. Most workers in this role earn between $15.05 and $22.55 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an Intern ASIC Design Engineer, and why are they important?

To thrive as an Intern ASIC Design Engineer, you need a solid background in digital logic design, computer architecture, and a relevant degree in electrical or computer engineering. Familiarity with hardware description languages such as Verilog or VHDL, simulation tools, and EDA software is typically required. Strong analytical thinking, attention to detail, teamwork, and effective communication make an intern stand out in this role. These skills and qualities are crucial for designing reliable, high-performance integrated circuits and collaborating efficiently within engineering teams.

What types of projects and responsibilities can I expect as an Intern ASIC Design Engineer?

As an Intern ASIC Design Engineer, you can expect to work on a variety of tasks that support the design and verification of integrated circuits. Typical responsibilities include assisting with RTL coding, running simulations, analyzing test results, and documenting design processes. You'll often collaborate closely with senior engineers and cross-functional teams, gaining exposure to state-of-the-art tools and methodologies. This role provides a valuable learning environment where you're encouraged to ask questions, contribute to team discussions, and develop practical skills that are highly valued in the semiconductor industry.

What does an Intern ASIC Design Engineer do?

An Intern ASIC Design Engineer assists in designing, developing, and verifying Application-Specific Integrated Circuits (ASICs) under the guidance of senior engineers. Their responsibilities often include working with hardware description languages like Verilog or VHDL, running simulations, debugging designs, and performing tests to ensure functionality and performance. Interns may also help with documentation, design reviews, and collaborating with cross-functional teams. This role provides hands-on experience in the semiconductor industry and helps build foundational skills for a career in hardware engineering.

What is the difference between Intern Asic Design Engineer vs Intern Digital Design Engineer?

AspectIntern Asic Design EngineerIntern Digital Design Engineer
CredentialsTypically pursuing or holding a degree in Electrical Engineering or Computer EngineeringTypically pursuing or holding a degree in Electrical Engineering or Computer Engineering
Work EnvironmentDesign teams focused on ASIC development, hardware design labs, collaborative projectsDigital circuit design, simulation, verification, and hardware testing environments
Industry UsageUsed in semiconductor companies, integrated circuit design firms, and hardware startupsCommon in semiconductor, electronics, and hardware development companies

Both roles involve working on digital hardware design, often requiring similar educational backgrounds. The main difference lies in the focus: Intern Asic Design Engineers work on the overall ASIC development process, while Intern Digital Design Engineers focus specifically on digital circuit design and verification. Both positions are essential in hardware development and often overlap in skills and work environment.

What are popular job titles related to Intern Asic Design Engineer jobs in Riverside, CA? For Intern Asic Design Engineer jobs in Riverside, CA, the most frequently searched job titles are:
What cities near Riverside, CA are hiring for Intern Asic Design Engineer jobs? Cities near Riverside, CA with the most Intern Asic Design Engineer job openings:

ASIC Design Engineer - Staff

Celero Communications, Inc.

Irvine, CA โ€ข On-site

$150K - $250K/yr

Full-time

Posted 22 days ago


Job description

About the Role:
Celero Communication Inc. is an exciting and fast-growing start-up in the semiconductor industry, pushing boundaries with innovative technologies that power the world's most advanced AI and data center infrastructure.
Celero is seeking skilled and motivated ASIC Design Engineers to join our team and contribute to the development of optical transceivers for next-generation optical modems. The ideal candidate will play a crucial role in designing and developing ASICs for cutting-edge technologies.
Locations Available: Irvine, CA HQ, San Jose, CA, Austin, TX, Ottawa Ontario, CN, & Vancouver
Key Responsibilities:
  • Design and implement digital circuits using HDL (Verilog/ System Verilog).
  • Perform synthesis, timing analysis, Lint, formal equivalence, Clock Domain Crossing (CDC) analysis
  • Optimize designs for performance, power, and area (PPA) requirements.
  • Perform RTL simulation and verification to ensure design functionality.
  • Participate in design reviews and provide technical guidance to team members.
  • Collaborate with cross-functional teams on system integration and validation.

Qualifications:
  • Bachelor's or higher degree in Electrical Engineering, Computer Engineering, or a related field.
  • 3+ years of experience in digital design and verification.
  • Proficiency in HDLs such as Verilog, or System Verilog.
  • Strong understanding of digital design principles and methodologies.
  • Familiarity with ASIC design flow, and experience with ASIC design tools.
  • Knowledge of low-power design techniques.
  • Familiarity with verification methodologies (e.g., UVM, formal verification).
  • Excellent problem-solving, strong communication and teamwork skills.

Preferred Skills
  • Strong knowledge of Digital Signal Processing (DSP), Digital Communication, and Forward Error Correction (FEC) techniques.
  • Experience with scripting languages (e.g., Python, Tcl).
  • Understanding of Optical Communication Standards is a plus.
  • Ability to multitask and adapt to a fast-paced, dynamic environment.

Salary Range
$150,000 - $250,000 Base Annually
The final offer will be determined based on job-related skills, experience, qualifications, and location.