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Ic Layout Engineer Remote Jobs in Minnesota (NOW HIRING)

skywater

Layout Principal Designer

Minneapolis, MN · On-site +1

... IC) technologies. This engineer will be a significant contributor to a broad array of design ... The position is based at our HQ site in Bloomington, MN, with consideration available for remote ...

SkyWater Technology

Layout Principal Designer

Bloomington, MN · On-site +1

$136.96K - $205.44K/yr

... IC) technologies. This engineer will be a significant contributor to a broad array of design ... The position is based at our HQ site in Bloomington, MN, with consideration available for remote ...

Evs

Civil Engineer

Eden Prairie, MN · On-site +1

$75K - $110K/yr

Eden Prairie, MN | Hybrid | Remote Schedule: Full-Time Salary: $75,000 - $110,000 (based on ... Independently execute site design and drafting with minimal supervision, including grading, layout ...

Fluence Corp.

Process Engineer

Plymouth, MN · On-site +1

This position will lead efforts in pre-sales support, P&ID and layout drafting, supporting project ... Supports remote or on-site startup of solutions design. * Other duties as assigned by the direct ...

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Ic Layout Engineer Remote information

What is an IC Layout Engineer Remote job?

An IC Layout Engineer Remote job involves designing and verifying integrated circuit (IC) layouts while working remotely. Responsibilities include creating physical IC designs, ensuring manufacturability, optimizing performance, and adhering to industry design rules. Engineers use electronic design automation (EDA) tools to develop layouts for analog, digital, or mixed-signal circuits. Remote IC layout engineers collaborate with design teams, review layouts, and address foundry requirements. Strong attention to detail, experience with EDA tools, and knowledge of semiconductor processes are essential for success in this role.

What are the key skills and qualifications needed to thrive in the Ic Layout Engineer Remote position, and why are they important?

To excel as an IC Layout Engineer Remote, you need strong expertise in semiconductor device physics, physical layout design, and a degree in electrical engineering or a related field. Proficiency with industry-standard EDA tools such as Cadence Virtuoso, Mentor Graphics, and knowledge of DRC/LVS verification processes is crucial; certifications in IC design can be an advantage. Exceptional attention to detail, strong communication, and the ability to collaborate effectively with geographically distributed teams are important soft skills. These abilities are vital for ensuring high-quality, efficient layouts that meet project specifications and facilitate seamless remote teamwork.

What are the typical collaboration practices for IC Layout Engineers working remotely?

IC Layout Engineers working remotely frequently collaborate with circuit design engineers, verification teams, and project managers using various digital communication platforms like Slack, Microsoft Teams, and shared project management tools. Regular virtual meetings and screen-sharing sessions are standard to review layouts, resolve design issues, and track project timelines. Remote engineers are often expected to document their work clearly and provide status updates to ensure all stakeholders are aligned. Emphasizing strong communication and proactive problem-solving helps maintain productivity and ensures successful project outcomes across different locations.
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Ic Layout Engineer Remote jobs near you

Layout Principal Designer

skywater

Minneapolis, MN • On-site, Remote

Other

Posted 12 days ago

Job description

This SkyWater Layout Principal Designer will primarily lead custom layout and Electronic Design Automation (EDA) activities to provide testchip collateral for semiconductor integrated circuit (IC) technologies. This engineer will be a significant contributor to a broad array of design projects supporting modeling, reliability, and yield as part of Process Design Kit (PDK) development for advanced CMOS or quantum technologies.

The position is based at our HQ site in Bloomington, MN, with consideration available for remote work.

Major Areas of Accountability:

  • Layout of new structures for eTest, modeling, reliability, yield, and IP testchips as part of new technology development
  • Version control and management of large design libraries with multiple contributors
  • Introduction of both custom and automated designs for both new & derivative layout projects supporting highly diverse technology flows
  • Utilize SkyWater PDK’s and provide feedback to internal teams on issues, improvements, capabilities, etc.
  • Lead physical verification and tape-in reviews

Required Qualifications:

  • Expert in custom layout design using IC EDA tool-assisted design flow such as Cadence and Siemens EDA tool suites, (e.g. Calibre and Virtuoso)
  • Familiarity with layout automation using SKILL, Tcl, python or other scripting languages.
  • Knowledge and experience in developing and/or using physical verification tools (DRC, ERC, LVS/PEX) and DFM tooling. 
  • Experience in IP project and/or library management.
  • Familiarity with typical mixed-signal IC design.
  • Clear communicator, concise written report skills, and inventive problem solver
  • U.S. Person Required: This position requires compliance with the International Traffic in Arms Regulations (ITAR). All accepted applicants must be U.S. Persons.
  • ITAR defines a U.S. Person as U.S. citizen, U.S. Permanent Resident, Political Asylee, or Refugee.
  • 7 - 10 years of experience with AS in Electronic Design fields. 5-7 years of experience with BS in Electrical Engineering, Microelectronics or related fields.

Preferred Qualifications:

  • Background in PDK development in some or all of the following fields: CMOS, MEMS, photonics, and superconducting.
  • Familiarity with parasitic extraction tools such as Mentor Calibre xRC, Cadence Quantus, or Synopsys StarRC.
  • Experience in project management of IC design (architecture to GDS) & fabrication (tape-out to post-silicon validation and testing).
  • Experience with chemical-mechanical polishing (CMP) shape density filling techniques.
  • Experience with data preparation and/or OPC methodologies.

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