... package assembly process simulation, Board Level Reliability (BLR), and Chip-Package-Board ... engineering teams * Deep expertise in IC electronic packaging structures, assembly processes ...
... package assembly process simulation, Board Level Reliability (BLR), and Chip-Package-Board ... engineering teams * Deep expertise in IC electronic packaging structures, assembly processes ...
We are looking for a hands-on Process Engineer, Packaging to keep our College Park cleanroom ... die/flip-chip bonding. * Create, validate, release, and maintain equipment recipes and process ...
We are looking for a hands-on Process Engineer, Packaging to keep our College Park cleanroom ... die/flip-chip bonding. * Create, validate, release, and maintain equipment recipes and process ...
We are looking for a hands-on Process Engineer, Packaging to keep our College Park cleanroom ... die/flip-chip bonding. * Create, validate, release, and maintain equipment recipes and process ...
We are looking for a hands-on Process Engineer, Packaging to keep our College Park cleanroom ... die/flip-chip bonding. * Create, validate, release, and maintain equipment recipes and process ...
Process Engineer - Packaging Operations Reports To: Engineering Manager Job Status: Salaried Job Locations: Pioneer, OH Our Purpose & Culture At Altenloh, Brinck & Co. US, we create opportunity ...
Process Engineer - Packaging Operations Reports To: Engineering Manager Job Status: Salaried Job Locations: Pioneer, OH Our Purpose & Culture At Altenloh, Brinck & Co. US, we create opportunity ...
Staff Board - Package co-design Engineer
Chandler, AZ · Hybrid
$198K - $268K/yr
... processors, focusing on aspects like chip packaging and System-on-Chip (SoC) integration. We ... Familiarity with different IC packaging technologies and their impact on PCB design to ensure ...
Staff Board - Package co-design Engineer
Chandler, AZ · Hybrid
$198K - $268K/yr
... processors, focusing on aspects like chip packaging and System-on-Chip (SoC) integration. We ... Familiarity with different IC packaging technologies and their impact on PCB design to ensure ...
Staff Board - Package co-design Engineer
Chandler, AZ · On-site
$198K - $268K/yr
... processors, focusing on aspects like chip packaging and System-on-Chip (SoC) integration. We ... Familiarity with different IC packaging technologies and their impact on PCB design to ensure ...
Staff Board - Package co-design Engineer
Chandler, AZ · On-site
$198K - $268K/yr
... processors, focusing on aspects like chip packaging and System-on-Chip (SoC) integration. We ... Familiarity with different IC packaging technologies and their impact on PCB design to ensure ...
Staff Board - Package co-design Engineer
Chandler, AZ · On-site
$198K - $268K/yr
... processors, focusing on aspects like chip packaging and System-on-Chip (SoC) integration. We ... Familiarity with different IC packaging technologies and their impact on PCB design to ensure ...
Staff Board - Package co-design Engineer
Chandler, AZ · On-site
$198K - $268K/yr
... processors, focusing on aspects like chip packaging and System-on-Chip (SoC) integration. We ... Familiarity with different IC packaging technologies and their impact on PCB design to ensure ...
This position requires someone familiar with development process of simulation and characterization ... of chip-package interaction and package-board interaction to ensure good device yield and ...
This position requires someone familiar with development process of simulation and characterization ... of chip-package interaction and package-board interaction to ensure good device yield and ...
This position requires someone familiar with development process of simulation and characterization ... of chip-package interaction and package-board interaction to ensure good device yield and ...
This position requires someone familiar with development process of simulation and characterization ... of chip-package interaction and package-board interaction to ensure good device yield and ...
Package Design Engineer - Staff Santa Clara, California, United States of America + 1 more Pack[...]
Santa Clara, CA · On-site
$158K/yr
Knowledge of IC packaging structures, chip-package, and package-board interaction.* Basic knowledge ... Basic knowledge of substrate manufacturing process, structure, design rules, and material ...
Package Design Engineer - Staff Santa Clara, California, United States of America + 1 more Pack[...]
Santa Clara, CA · On-site
$158K/yr
Knowledge of IC packaging structures, chip-package, and package-board interaction.* Basic knowledge ... Basic knowledge of substrate manufacturing process, structure, design rules, and material ...
FEA Packaging Engineer
Palo Alto, CA · On-site
Resolve the temperature field across the photonic IC to the resolution photonic design requires ... process excursion. * Experience with advanced packaging construction: flip chip, 2.5D/3D ...
FEA Packaging Engineer
Palo Alto, CA · On-site
Resolve the temperature field across the photonic IC to the resolution photonic design requires ... process excursion. * Experience with advanced packaging construction: flip chip, 2.5D/3D ...
Staff PCB - Package co-design Engineer
Chandler, AZ · On-site
$198K - $268K/yr
... processors, focusing on aspects like chip packaging and System-on-Chip (SoC) integration. We ... Familiarity with different IC packaging technologies and their impact on PCB design to ensure ...
Staff PCB - Package co-design Engineer
Chandler, AZ · On-site
$198K - $268K/yr
... processors, focusing on aspects like chip packaging and System-on-Chip (SoC) integration. We ... Familiarity with different IC packaging technologies and their impact on PCB design to ensure ...
Principal Photonics Package Architect
San Jose, CA · On-site
$185K - $240K/yr
D. in Electrical Engineering, Mechanical Engineering, Materials Science, Physics, or a related ... Experience with advanced packaging design, including 2.5D and 3D package architectures.
Principal Photonics Package Architect
San Jose, CA · On-site
$185K - $240K/yr
D. in Electrical Engineering, Mechanical Engineering, Materials Science, Physics, or a related ... Experience with advanced packaging design, including 2.5D and 3D package architectures.
$198K - $268K/yr
... processors, focusing on aspects like chip packaging and System-on-Chip (SoC) integration. We ... Familiarity with different IC packaging technologies and their impact on PCB design to ensure ...
$198K - $268K/yr
... processors, focusing on aspects like chip packaging and System-on-Chip (SoC) integration. We ... Familiarity with different IC packaging technologies and their impact on PCB design to ensure ...
Jacksonville, Florida, United States of America Johnson and Johnson Vision Care, a member of the Johnson & Johnson family of companies is currently recruiting for a Packaging Process Engineer to be ...
Jacksonville, Florida, United States of America Johnson and Johnson Vision Care, a member of the Johnson & Johnson family of companies is currently recruiting for a Packaging Process Engineer to be ...
Jacksonville, Florida, United States of America Johnson and Johnson Vision Care, a member of the Johnson & Johnson family of companies is currently recruiting for a Packaging Process Engineer to be ...
Jacksonville, Florida, United States of America Johnson and Johnson Vision Care, a member of the Johnson & Johnson family of companies is currently recruiting for a Packaging Process Engineer to be ...
Jacksonville, Florida, United States of America Johnson and Johnson Vision Care, a member of the Johnson & Johnson family of companies is currently recruiting for a Packaging Process Engineer to be ...
Jacksonville, Florida, United States of America Johnson and Johnson Vision Care, a member of the Johnson & Johnson family of companies is currently recruiting for a Packaging Process Engineer to be ...
FEA Packaging Engineer
Palo Alto, CA · On-site
Resolve the temperature field across the photonic IC to the resolution photonic design requires ... process excursion. * Experience with advanced packaging construction: flip chip, 2.5D/3D ...
FEA Packaging Engineer
Palo Alto, CA · On-site
Resolve the temperature field across the photonic IC to the resolution photonic design requires ... process excursion. * Experience with advanced packaging construction: flip chip, 2.5D/3D ...
Jacksonville, Florida, United States of America Johnson and Johnson Vision Care, a member of the Johnson & Johnson family of companies is currently recruiting for a Packaging Process Engineer to be ...
Jacksonville, Florida, United States of America Johnson and Johnson Vision Care, a member of the Johnson & Johnson family of companies is currently recruiting for a Packaging Process Engineer to be ...
Package Design Engineer
Sunnyvale, CA · On-site
$159K/yr
Additionally, you will be instrumental in identifying and incorporating advanced chip packaging ... Information collected and processed as part of your Google Careers profile, and any job ...
Package Design Engineer
Sunnyvale, CA · On-site
$159K/yr
Additionally, you will be instrumental in identifying and incorporating advanced chip packaging ... Information collected and processed as part of your Google Careers profile, and any job ...
Ic Chip Packaging Process Engineer information
See salary details
$49.5K - $58K
2% of jobs
$58K - $66.4K
9% of jobs
$74.1K is the 25th percentile. Wages below this are outliers.
$66.4K - $74.9K
15% of jobs
$74.9K - $83.3K
18% of jobs
The median wage is $86.2K / yr.
$83.3K - $91.8K
17% of jobs
$91.8K - $100.2K
14% of jobs
$100.4K is the 75th percentile. Wages above this are outliers.
$100.2K - $108.7K
11% of jobs
$108.7K - $117.1K
6% of jobs
$117.1K - $125.6K
4% of jobs
$125.6K - $134K
3% of jobs
$134K - $142.5K
1% of jobs
$49.5K
$92K
$142.5K
How much do ic chip packaging process engineer jobs pay per year?
What are popular job titles related to Ic Chip Packaging Process Engineer jobs?
For Ic Chip Packaging Process Engineer jobs, the most frequently searched job titles are:

Director, IC Packaging Engineering - Mechanical Simulation
San Diego, CA • On-site
Full-time
Re-posted 17 days ago
Qualcomm rating
8.8
Based on 11 frontline employees who took The Breakroom Quiz
Job description
Qualcomm Technologies, Inc.
Job Area:
Engineering Group, Engineering Group > Packaging Engineering
General Summary:
This position is part of Qualcomm's Integrated Circuits (IC) Packaging organization and represents a senior leadership role within the Mechanical Simulation function. The Director will lead a team of engineers responsible for delivering FEA-based mechanical simulation solutions in support of Qualcomm's current and next-generation chipsets and advanced packaging technologies.
The Director will drive strategic alignment across IC package design/architecture, New Product Introduction (NPI), assembly, and Chip-Package Interaction (CPI) teams, ensuring high-quality mechanical simulation support across High Volume Manufacturing (HVM) and advanced packaging programs. This leader will be accountable for setting team direction, developing talent, managing cross-functional stakeholder relationships, and advancing simulation methodology and best practices.
Core technical responsibilities include overseeing the development and validation of mechanical FEA models (ANSYS APDL), establishing BKM methodology for test correlation and material characterization, and guiding stress/mechanical analysis for IC package designs. Simulation scope includes Warpage, Solder Joint Reliability (SJR), package assembly process simulation, Board Level Reliability (BLR), and Chip-Package-Board interaction. The Director is expected to champion innovation in simulation workflows, automation, and tooling to improve team efficiency and scalability.
All Qualcomm employees are expected to actively support diversity on their teams and in the Company.
Minimum Qualifications:
• Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 8+ years of System/Package Design/Technology Engineering or related work experience.
OR
Master's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 7+ years of System/Package Design/Technology Engineering or related work experience.
OR
PhD in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 6+ year of System/Package Design/Technology Engineering or related work experience.
Preferred Qualifications:
- Ph.D. in Mechanical Engineering, Materials Science, Electrical/Microelectronics Engineering, or related field
- 12+ years of combined experience in Finite Element modeling and analysis for IC electronic packaging and interconnects
- 5+ years of direct people management, with experience managing managers or senior technical staff
- Proven track record of building and scaling high-performing simulation or engineering teams
- Deep expertise in IC electronic packaging structures, assembly processes, reliability testing and analysis, CPI, Package-Board interaction, and DOE
- Strong background in electronic packaging materials and thermo-mechanical behavior
- Experience establishing simulation BKMs, methodologies, and automation frameworks (e.g., APDL macros, OptiSLang, scripting/automation pipelines)
- Experience with material testing for strength and fracture, including designing and executing mechanical test methods
- Demonstrated experience presenting technical roadmaps and simulation strategies to executive and customer audiences
- Publications or patents in FEA predictive modeling, Warpage/SJR, and/or interfacial fracture testing (plus)
- Experience working with external customers or partners in a technical liaison or program leadership capacity
- Excellent communication, influencing, and cross-functional collaboration skills
- Ability to manage competing priorities across multiple programs and business units
- Demonstrated ability to lead cross-functional technical programs and influence at senior levels
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Pay range and Other Compensation & Benefits:
$227,300.00 - $340,900.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
About Qualcomm
Sourced by ZipRecruiter
Qualcomm is enabling a world where everyone and everything can be intelligently connected. You interact with products and technologies made possible by Qualcomm every day, including 5G-enabled smartphones that double as pro-level cameras and gaming devices, smarter vehicles and cities, and the technology behind the smart, connected factories that manufactured your latest purchase. Our powerful connectivity solutions keep you connected—even in remote areas. Qualcomm 5G and AI innovations are the power behind the connected intelligent edge. You’ll find our technologies behind and inside the innovations that deliver significant value across multiple industries and to billions of people every day.
Industry
Technology, communication and media
Company size
10,000+ Employees
Headquarters location
San Diego, CA, US
Year founded
1985