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High Speed Adc Test Engineer Jobs (NOW HIRING)

High-speed RF Test Engineer

Sunnyvale, CA ยท On-site

$139K - $258K/yr

We are seeking a talented RF Engineer to join our dynamic team at Sunnyvale, CA. In this role, you ... Your experience with high-speed equipment will be highly valuable as we test optoelectronic devices ...

We are seeking a talented RF Engineer to join our dynamic team at Sunnyvale, CA. In this role, you ... Your experience with high-speed equipment will be highly valuable as we test optoelectronic devices ...

... high-speed electronic systems. Work with systems incorporating microcontrollers, EEPROMs, ADC/DACs ... Cross-Functional Collaboration The Test Engineer will work closely with: Electrical and Hardware ...

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High Speed Adc Test Engineer information

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How much do high speed adc test engineer jobs pay per hour?

As of Sep 10, 2026, the average hourly pay for high speed adc test engineer in the United States is $38.22, according to ZipRecruiter salary data. Most workers in this role earn between $27.16 and $46.39 per hour, depending on experience, location, and employer.

What are popular job titles related to High Speed Adc Test Engineer jobs?

For High Speed Adc Test Engineer jobs, the most frequently searched job titles are:

Senior Electrical Engineer (FPGA / High-Speed / Mixed-Signal)

San Jose, CA โ€ข On-site

$121K - $164K/yr

Other

Re-posted 21 days ago


Job description

Key Responsibilities
  1. FPGA-Based System Architecture
    • Define FPGA-centric system architectures for high-throughput data processing platforms
    • Partition functionality across FPGA, ADC/DAC, and host interfaces
    • Collaborate with FPGA/FW teams on interface definition, timing, and performance
  2. High-Speed Digital & SerDes Design
    • Design and integrate high-speed interfaces including:
    • DDR4/DDR memory subsystems
    • PCIe Gen3/Gen4 interfaces
    • QSFP (10G/25G/40G/100G) links
    • 10G+ SerDes channels
    • Define routing constraints, stack-up, and impedance control
    • Ensure signal integrity, timing closure, and link stability
  3. Mixed-Signal & Analog Front-End Design
    • Design and integrate high-speed ADC/DAC signal chains
    • Data Converter Architectures (DCA)
    • Precision analog front-end (AFE) circuits
    • Develop circuits using low-noise OpAmps, filters, and gain stages
    • Optimize performance metrics such as SNR, ENOB, bandwidth, and jitter sensitivity
  4. Power System Design
    • Design multi-rail DC/DC power systems for FPGA and high-speed circuits
    • Manage power sequencing, noise, ripple, and efficiency
    • Ensure power integrity for sensitive ADC and high-speed SerDes subsystems
  5. Hardware Design & PCB Implementation
    • Own schematic design and hardware architecture (Xpedition preferred)
    • Guide PCB layout for high-layer-count, high-speed boards
    • Lead design reviews focusing on SI/PI/EMI risks
    • Ensure manufacturability (DFM) and testability (DFT)
  6. System Bring-up & Debug
    • Lead board bring-up and system integration:
      1. DDR training
      2. PCIe and SerDes link-up
      3. ADC performance validation
    • Debug issues related to:
      1. Signal integrity
      2. Jitter and noise
      3. Power coupling and system interaction
    • Use lab tools such as oscilloscopes, TDR/VNA, and protocol analyzers
  7. Cross-Functional Collaboration
    • Work closely with FPGA, firmware, software, mechanical, and system engineering teams
    • Align electrical design with system-level performance requirements
    • Drive cross-domain trade-offs
  8. Technical Leadership
    • Lead architectural decisions and technical reviews
    • Mentor junior engineers in high-speed and mixed-signal design
    • Drive structured problem-solving across complex systems
Required Qualifications
  • Bachelorโ€™s or Masterโ€™s degree in Electrical Engineering or related field
  • 8-12+ years of experience in high-speed, FPGA, or mixed-signal systems
Core Technical Requirements
  • FPGA-based system design experience
  • DDR4 memory subsystem design experience
  • PCIe / SerDes / high-speed link experience
  • ADC and analog front-end design experienceDC/DC power system design experience
Fundamentals
  • Strong understanding of:
    • Signal Integrity (SI)
    • Power Integrity (PI)
    • High-speed timing and jitter analysis
Preferred Qualifications
  • Hands-on experience with FPGA platforms (Intel / Xilinx)
  • Experience with:
    • High-speed data converters
    • Optical interfaces / QSFP modules
    • JESD204 or similar high-speed data links
  • Strong PCB design experience with high-speed constraints
  • Experience with tools such as:
    • Xpedition (Mentor / Siemens)
    • SI/PI analysis tools
Strong Plus
  • Experience in semiconductor equipment, imaging, or instrumentation systems
  • Experience with multi-board or modular systems
  • Understanding of signal-power-thermal coupling effects
  • Full product lifecycle experience (R&D -> NPI -> production)
Soft Skills
  • Strong ownership mindset and accountability
  • Ability to solve complex multi-domain engineering problems
  • Excellent communication and cross-functional collaboration skills
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