ZipRecruiter

Log In

1

Hardware Design Verification Engineer Jobs (NOW HIRING)

Baidu USA

Design Verification Engineer

Sunnyvale, CA · On-site

$159K - $194K/yr

Do you want to work with a world-class team to explore the fast-growing AI hardware opportunities ... Your job responsibilities as a Design Verification Engineer will help the team to verify the ...

Broadcom

Design Verification Engineer

Broomfield, CO · On-site

$137K - $167K/yr

Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... Experience with hardware design and debug * Experience with emulation (Palladium, Veloce, Zebu) and ...

COGENT Infotech

Design Verification Engineer

Saratoga, CA · On-site

$150K - $183K/yr

Design Verification Engineer Location: Saratoga, CA (Onsite)-5 days We are seeking a Design Verification Engineer with 8+ years of experience in semiconductor verification. The ideal candidate will ...

Baidu USA

Design Verification Engineer

Sunnyvale, CA · On-site

$159K - $194K/yr

Do you want to work with a world-class team to explore the fast-growing AI hardware opportunities ... Your job responsibilities as a Design Verification Engineer will help the team to verify the ...

Broadcom

Design Verification Engineer

San Jose, CA

$159K - $194K/yr

Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... Experience with hardware design and debug * Experience with emulation (Palladium, Veloce, Zebu) and ...

Apple

GPU Design Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

The GPU Design Verification Engineer will be responsible for the pre-silicon RTL verification of ... This role will grow your expertise in both software engineering as well as graphics hardware ...

Broadcom, Inc.

Design Verification Engineer

Broomfield, CO · On-site

$137K - $167K/yr

Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... Experience with hardware design and debug * Experience with emulation (Palladium, Veloce, Zebu) and ...

Normal Computing

Design Verification Engineer

New York, NY · On-site

$148K - $181K/yr

We build foundational hardware and software for the semiconductor industry, critical AI ... The Role As a Design Verification Engineer at Normal, you will verify our own physics-inspired ...

Broadcom

Design Verification Engineer

Irvine, CA

$146K - $178K/yr

Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... Experience with hardware design and debug * Experience with emulation (Palladium, Veloce, Zebu) and ...

Purple Hires Inc

Design Verification Engineer

Plano, TX · On-site

$130K - $158K/yr

and other details - We are seeking an ASIC Design Verification Engineer whose role will be to ... Solid understanding of SystemVerilog, digital logic, and hardware verification flows. Proficiency ...

Optimalsemi

Design Verification Engineer

Dallas, TX · On-site

$135K - $164K/yr

Fiori Technology Solutions is currently hiring for a Design Verification Engineer. This is fulltime ... CM3/4/CM33) with complex peripherals, hardware accelerators, memory architectures, bus ...

Apple

Design Verification Engineer

Cupertino, CA · On-site

$167K - $204K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... This is a critical job within Apple's Hardware Technology organization, and we'd love to have you ...

Apple

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... This is a critical job within Apple's Hardware Technology organization, and we'd love to have you ...

Texas Instruments

Design Verification Engineer

Dallas, TX · On-site

$135K - $164K/yr

Texas Instruments is seeking a Design Verification Engineer to join our Analog Power Products organization in Dallas. In this role, you will develop and execute verification strategies that ensure ...

Texas Instruments

Design Verification Engineer

Knoxville, TN · On-site

$129K - $158K/yr

Love your job. Texas Instruments is seeking a Design Verification Engineer to join our Analog Power Products organization in Knoxville. In this role, you will develop and execute verification ...

Apple

Design Verification Engineer

Waltham, MA · On-site

$146K - $179K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... This is a critical job within Apple's Hardware Technology organization, and we'd love to have you ...

previous pagenext page

Showing results 21-40

All JobsTechnology JobsSoftware JobsSoftware Quality Engineer JobsHardware Design Verification Engineer Jobs

Hardware Design Verification Engineer information

See salary details

$69.5K

$147.5K

$215K

How much do hardware design verification engineer jobs pay per year?

As of Sep 10, 2026, the average yearly pay for hardware design verification engineer in the United States is $147,512.00, according to ZipRecruiter salary data. Most workers in this role earn between $120,000.00 and $174,000.00 per year, depending on experience, location, and employer.

What is a hardware design verification engineer?

Hardware Design Verification Engineers are professionals who ensure that electronic hardware designs, such as microchips and circuit boards, function as intended before they are manufactured. They use a combination of simulation, formal methods, and testbench creation to verify that the hardware meets all specifications and requirements. These engineers often work closely with design teams to identify bugs or design flaws early in the development process, helping to reduce costly errors and improve product reliability. Their role is critical in industries like semiconductor, automotive, and consumer electronics, where hardware integrity is essential.

What are the key skills and qualifications needed to thrive as a hardware design verification engineer?

To thrive as a Hardware Design Verification Engineer, you need a solid background in digital design principles, computer architecture, and verification methodologies, typically with a degree in electrical or computer engineering. Familiarity with hardware description languages (such as Verilog or VHDL), simulation tools (like ModelSim or VCS), and experience with verification frameworks like UVM are crucial. Attention to detail, problem-solving, and effective communication are standout soft skills in this role. These competencies ensure rigorous testing and validation of hardware components, minimizing design flaws and ensuring reliable product performance.

What are some common challenges faced by hardware design verification engineers during the verification process?

Hardware Design Verification Engineers often encounter challenges such as managing complex verification environments, ensuring comprehensive test coverage, and keeping up with rapidly changing design specifications. Collaborating closely with design teams is essential to resolve ambiguities and identify potential bugs early. Additionally, balancing thorough verification with project deadlines requires strong time management and problem-solving skills. Staying updated on the latest verification methodologies and tools also plays a crucial role in overcoming these challenges.

What is the difference between Hardware Design Verification Engineer vs Hardware Design Engineer?

AspectHardware Design Verification EngineerHardware Design Engineer
Primary FocusVerifying hardware designs meet specifications through testing and simulationCreating and developing hardware designs and schematics
Skills & CertificationsKnowledge of verification tools, scripting, hardware description languages (HDL)Proficiency in HDL, circuit design, and schematic capture
Work EnvironmentTesting labs, simulation environments, collaboration with design teamsDesign labs, CAD tools, collaboration with verification teams
Industry UsageCommon in semiconductor, electronics, and embedded systems companies

The Hardware Design Verification Engineer primarily focuses on testing and validating hardware designs to ensure they function correctly, while the Hardware Design Engineer is responsible for creating and developing the hardware itself. Both roles require knowledge of HDL and often work closely in the hardware development process, but their core tasks differ significantly.

What cities are hiring for Hardware Design Verification Engineer jobs?

Cities with the most Hardware Design Verification Engineer job openings:

What states have the most Hardware Design Verification Engineer jobs?

States with the most job openings for Hardware Design Verification Engineer jobs include:

What are popular job titles related to Hardware Design Verification Engineer jobs?

For Hardware Design Verification Engineer jobs, the most frequently searched job titles are:

Design Verification Engineer

Sunnyvale, CA • On-site

Baidu USA
See more jobs at Baidu USAexternal

$159K - $194K/yr

Full-time

Re-posted yesterday

Job description

Do you want to be part of the AI revolution? Do you want to think out of the box, thriving on challenges in AI industry and have the desire to solve them? Do you want to work with a world-class team to explore the fast-growing AI hardware opportunities and impact on AI industry?
We're looking forward to you joining us to collaborate, contribute, and revolutionize AI silicon and system.
Description
We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive in this highly technical environment. Your job responsibilities as a Design Verification Engineer will help the team to verify the functionality of Baidu's AI SoC at both block level and SoC level.
You will help on UVM Testbench development, directed/constrained random test generation, failure analysis and resolution, coverage analysis, and flow development.
Run RTL and gate level functional verification, debug failures, lead bug tracking, and analyze and close coverage.
Work closely with the design and systems engineering teams to review specifications and architecture, extract features, define verification plan & coverage model.
Support mixed-signal co-simulation using Verilog models of analog IP. Develop testbench, test cases, reference model, coverage model and automation of regression suite.
Support emulation and silicon bring up debug with your smart ideas to duplicate the problem in simulation.
Qualifications
  • Minimum 5 years of experience of UVM based verification on a significantly complex project.
  • Advanced knowledge of standard ASIC design and verification flows, simulation and testbench development.
  • Advanced knowledge of System Verilog and the UVM methodology.
  • Solid verification skills in problem solving, constrained random testing, coverage closure, gate level simulations, X propagation.
  • Good practice of one scripting language (Perl, Python, Tcl) no preference.
  • SoC and IP verification experience on either one aspect (PCIe, Ethernet, HBM, GDDR, DDR, MMU, Cache).
  • Familiar with C/C++.
  • Formal Verification (Model Checking, Equivalence Checking).
  • Excellent communication skills in both English and Chinese.

Culture Fit:
  • Mission alignment: If you want to be part of a team to accomplish this great mission, we will provide you the best possible platform to do that.
  • Self-directed: We work best with people that are driven, motivated, and aspire to greatness.
  • Hungry to learn: We are eager to see you learn new skills and grow.
  • Team orientation: We work in small, fast-moving teams. We watch out for each other and go after big goals together as a team.

#LI-DNI

Apply