Design Verification Engineer
$105K - $149K/yr
Minimum Qualifications BS or MS in Electrical Engineering, Computer Engineering, or Computer Science and 3+ months of Internship experience in a hardware design or verification environment Foundation ...
$105K - $149K/yr
Minimum Qualifications BS or MS in Electrical Engineering, Computer Engineering, or Computer Science and 3+ months of Internship experience in a hardware design or verification environment Foundation ...
$105K - $149K/yr
Minimum Qualifications BS or MS in Electrical Engineering, Computer Engineering, or Computer Science and 3+ months of Internship experience in a hardware design or verification environment Foundation ...
Santa Clara, CA · On-site
$105K - $149K/yr
Minimum Qualifications • BS or MS in Electrical Engineering, Computer Engineering, or Computer Science and 3+ months of Internship experience in a hardware design or verification environment • ...
Santa Clara, CA · On-site
$105K - $149K/yr
Minimum Qualifications • BS or MS in Electrical Engineering, Computer Engineering, or Computer Science and 3+ months of Internship experience in a hardware design or verification environment • ...
San Jose, CA · On-site
$159K - $194K/yr
Etched Design Verification Engineer 6 Openings Location: San Jose, CA & Austin, TX - onsite Please ... hardware-software stack. This role demands creativity, deep technical ability, and the drive to ...
San Jose, CA · On-site
$159K - $194K/yr
Etched Design Verification Engineer 6 Openings Location: San Jose, CA & Austin, TX - onsite Please ... hardware-software stack. This role demands creativity, deep technical ability, and the drive to ...
Santa Clara, CA · On-site
$159K - $195K/yr
We are seeking a skilled Design Verification Engineer to join our hardware engineering team. The ideal candidate will be responsible for verifying complex digital designs using advanced verification ...
Santa Clara, CA · On-site
$159K - $195K/yr
We are seeking a skilled Design Verification Engineer to join our hardware engineering team. The ideal candidate will be responsible for verifying complex digital designs using advanced verification ...
San Diego, CA · On-site
$144K - $176K/yr
Engineering Group, Engineering Group > ASICS Engineering General Summary: We are seeking highly ... This involves hardware design verification of advanced CPUs, Memory architecture, AI Accelerators ...
San Diego, CA · On-site
$144K - $176K/yr
Engineering Group, Engineering Group > ASICS Engineering General Summary: We are seeking highly ... This involves hardware design verification of advanced CPUs, Memory architecture, AI Accelerators ...
$144K - $176K/yr
Design Verification Engineer Job Type : Full time Location : San Diego And Bay Area : Strong ... Multimedia Camera Image processing, Video or graphics hardware experience is preferred. Strong ...
$144K - $176K/yr
Design Verification Engineer Job Type : Full time Location : San Diego And Bay Area : Strong ... Multimedia Camera Image processing, Video or graphics hardware experience is preferred. Strong ...
$120K - $225K/yr
We're hiring experienced Design Verification Engineers from junior to senior levels to play a key ... Because today's AI workloads are too large and intricate to be fully verified in hardware alone ...
$120K - $225K/yr
We're hiring experienced Design Verification Engineers from junior to senior levels to play a key ... Because today's AI workloads are too large and intricate to be fully verified in hardware alone ...
Menlo Park, CA · On-site
$160K - $195K/yr
Job Functions Develop FPGA Design Verification tests, and test plans Review Detailed Design ... RTL/Logic, hardware design, and firmware engineers Qualifications: BS, MS CS, EE or related ...
Menlo Park, CA · On-site
$160K - $195K/yr
Job Functions Develop FPGA Design Verification tests, and test plans Review Detailed Design ... RTL/Logic, hardware design, and firmware engineers Qualifications: BS, MS CS, EE or related ...
Palo Alto, CA · On-site
$120K - $225K/yr
We're hiring experienced Design Verification Engineers from junior to senior levels to play a key ... Because today's AI workloads are too large and intricate to be fully verified in hardware alone ...
Palo Alto, CA · On-site
$120K - $225K/yr
We're hiring experienced Design Verification Engineers from junior to senior levels to play a key ... Because today's AI workloads are too large and intricate to be fully verified in hardware alone ...
Palo Alto, CA · On-site
$120K - $225K/yr
We're hiring experienced Design Verification Engineers from junior to senior levels to play a key ... Because today's AI workloads are too large and intricate to be fully verified in hardware alone ...
Quick apply
Palo Alto, CA · On-site
$120K - $225K/yr
We're hiring experienced Design Verification Engineers from junior to senior levels to play a key ... Because today's AI workloads are too large and intricate to be fully verified in hardware alone ...
Sunnyvale, CA · On-site
$159K - $194K/yr
Do you want to work with a world-class team to explore the fast-growing AI hardware opportunities ... Your job responsibilities as a Design Verification Engineer will help the team to verify the ...
Sunnyvale, CA · On-site
$159K - $194K/yr
Do you want to work with a world-class team to explore the fast-growing AI hardware opportunities ... Your job responsibilities as a Design Verification Engineer will help the team to verify the ...
San Diego, CA · On-site
$144K - $176K/yr
Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... Experience with hardware design and debug * Experience with emulation (Palladium, Veloce, Zebu) and ...
San Diego, CA · On-site
$144K - $176K/yr
Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... Experience with hardware design and debug * Experience with emulation (Palladium, Veloce, Zebu) and ...
Palo Alto, CA · On-site
$200K - $420K/yr
To achieve this, we are rewriting the entire stack from scratch: personal hardware for local ... About the Role We are seeking exception design verification engineers to ensure our high ...
Palo Alto, CA · On-site
$200K - $420K/yr
To achieve this, we are rewriting the entire stack from scratch: personal hardware for local ... About the Role We are seeking exception design verification engineers to ensure our high ...
$200K - $420K/yr
To achieve this, we are rewriting the entire stack from scratch: personal hardware for local ... About the Role We are seeking exception design verification engineers to ensure our high ...
$200K - $420K/yr
To achieve this, we are rewriting the entire stack from scratch: personal hardware for local ... About the Role We are seeking exception design verification engineers to ensure our high ...
Sunnyvale, CA · On-site
$159K - $194K/yr
Do you want to work with a world-class team to explore the fast-growing AI hardware opportunities ... Your job responsibilities as a Design Verification Engineer will help the team to verify the ...
Sunnyvale, CA · On-site
$159K - $194K/yr
Do you want to work with a world-class team to explore the fast-growing AI hardware opportunities ... Your job responsibilities as a Design Verification Engineer will help the team to verify the ...
Santa Clara, CA · On-site
$159K - $195K/yr
The GPU Design Verification Engineer will be responsible for the pre-silicon RTL verification of ... This role will grow your expertise in both software engineering as well as graphics hardware ...
Santa Clara, CA · On-site
$159K - $195K/yr
The GPU Design Verification Engineer will be responsible for the pre-silicon RTL verification of ... This role will grow your expertise in both software engineering as well as graphics hardware ...
San Jose, CA · On-site
$159K - $194K/yr
Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... Experience with hardware design and debug * Experience with emulation (Palladium, Veloce, Zebu) and ...
San Jose, CA · On-site
$159K - $194K/yr
Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... Experience with hardware design and debug * Experience with emulation (Palladium, Veloce, Zebu) and ...
Irvine, CA · On-site
$146K - $178K/yr
Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... Experience with hardware design and debug * Experience with emulation (Palladium, Veloce, Zebu) and ...
Irvine, CA · On-site
$146K - $178K/yr
Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... Experience with hardware design and debug * Experience with emulation (Palladium, Veloce, Zebu) and ...
Sunnyvale, CA · On-site
$159K - $194K/yr
Collaborate with architects, hardware engineers and multiple IP development groups. Drive formal verification for the block and write formal properties and assertions to verify the design ...
Quick apply
Sunnyvale, CA · On-site
$159K - $194K/yr
Collaborate with architects, hardware engineers and multiple IP development groups. Drive formal verification for the block and write formal properties and assertions to verify the design ...
San Diego, CA · On-site
$144K - $176K/yr
Design Verification Engineers at Apple are responsible for verifying the functionality and ... This is a critical job within Apple's Hardware Technology and we'd love to have you join us.
San Diego, CA · On-site
$144K - $176K/yr
Design Verification Engineers at Apple are responsible for verifying the functionality and ... This is a critical job within Apple's Hardware Technology and we'd love to have you join us.
$68.6K - $81.6K
1% of jobs
$81.6K - $94.7K
3% of jobs
$94.7K - $107.8K
12% of jobs
$117.5K is the 25th percentile. Wages below this are outliers.
$107.8K - $120.8K
11% of jobs
$120.8K - $133.9K
16% of jobs
The median wage is $138.3K / yr.
$133.9K - $146.9K
16% of jobs
$146.9K - $160K
11% of jobs
$165.1K is the 75th percentile. Wages above this are outliers.
$160K - $173K
7% of jobs
$173K - $186.1K
7% of jobs
$186.1K - $199.1K
6% of jobs
$199.1K - $212.2K
7% of jobs
$68.6K
$145.6K
$212.2K
| Aspect | Hardware Design Verification Engineer | Hardware Design Engineer |
|---|---|---|
| Primary Focus | Verifying hardware designs meet specifications through testing and simulation | Creating and developing hardware designs and schematics |
| Skills & Certifications | Knowledge of verification tools, scripting, hardware description languages (HDL) | Proficiency in HDL, circuit design, and schematic capture |
| Work Environment | Testing labs, simulation environments, collaboration with design teams | Design labs, CAD tools, collaboration with verification teams |
| Industry Usage | Common in semiconductor, electronics, and embedded systems companies |
The Hardware Design Verification Engineer primarily focuses on testing and validating hardware designs to ensure they function correctly, while the Hardware Design Engineer is responsible for creating and developing the hardware itself. Both roles require knowledge of HDL and often work closely in the hardware development process, but their core tasks differ significantly.
Cities in California with the most Hardware Design Verification Engineer job openings:
Santa Clara, CA
$105K - $149K/yr
Full-time
Medical, Retirement, PTO
Re-posted 26 days ago
8.7
Based on 147 frontline employees who took The Breakroom Quiz
About Intel & Silicon Chassis
Intel is seeking an Entry Level Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to the verification of next-generation interconnect and chassis IPs that underpin Intel's most ambitious SoC and platform products.
Position Overview
You will work alongside senior engineers to build testbenches, write constrained-random tests, close functional coverage, and root-cause simulation failures - developing end-to-end verification skills from day one.
We look for engineers who think algorithmically, write clean code, and are excited to apply the latest AI-assisted development tools as a core part of how they work. You do not need to know everything on day one; you do need strong fundamentals, genuine curiosity, and the drive to ramp fast.
Key Responsibilities
Develop testbench components, constrained-random stimulus, and functional checkers for interconnect and chassis IP under guidance of senior engineers
Write, run, and debug simulation tests; analyze failures and root-cause issues to closure with clear technical write-ups
Contribute to functional coverage plans, coverage closure analysis, and regression triage
Participate in spec reviews, design discussions, and bug triage; learn to contribute across architecture, design, and software boundaries
Use AI-assisted coding and debugging tools as an everyday part of development workflow; actively contribute to the team's productivity through automation and scripting
Continuously build depth in hardware design, verification methodology, and the chip development flow
What We're Looking For
You should demonstrate the following professional traits to be successful:
Genuine curiosity and the drive to ramp fast
Algorithmic thinking with a commitment to writing clean code
Enthusiasm for applying the latest AI-assisted development tools as a core part of how you work
This position is not eligible for Intel immigration sponsorship.
Minimum Qualifications
BS or MS in Electrical Engineering, Computer Engineering, or Computer Science and 3+ months of Internship experience in a hardware design or verification environment
Foundation in logic design and digital circuits - required; ability to read and reason about RTL is essential
Demonstrated algorithmic thinking and software fundamentals application - required
Demonstrated proficiency in at least one of C/C++, Python, or SystemVerilog through coursework, projects, or internships
Coursework or project exposure to two or more of the following: computer architecture, parallel and distributed computing, operating systems, hardware/software interfaces, VLSI design
Demonstrated use of AI coding assistants as a regular part of coursework or project work - not occasional use, but as a genuine productivity tool
Preferred Qualifications
Coursework or project work in hardware verification, FPGA design, or RTL simulation (ModelSim, VCS, Questa, or similar)
Exposure to SystemVerilog, UVM concepts, or assertion-based verification through coursework, self-study, or internship
Familiarity with standard bus protocols (AXI, AHB, PCIe) or cache/memory hierarchy concepts
Demonstrated project work (senior design, research, hackathon, personal) involving hardware modeling, algorithm implementation in HDL, or hardware-software co-design
Comfort working in Linux environments, using version control (git), and writing build/test automation scripts
Worked experience in any related field
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Sourced by ZipRecruiter
Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
Manufacturing
10,000+ Employees
Santa Clara, CA, US
1968