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Google Asic Design Engineer Jobs in Kentucky (NOW HIRING)

Atom Computing, Inc.

$140 - $175/hr

Join a world-class team of scientists, engineers, and business professionals to advance the state-of-the-art in quantum computing. Atom Computing is seeking a Senior ASIC Designer to design and ...

New

GlobalFoundries inc.

$165 - $275/hr

... ASIC design flow + Synthesis and timing analysis* Proven track record of successful silicon delivery.* Experience leading medium to large engineering teams.* Strong understanding of PPA optimization ...

Canon Medical Research Usa, Inc.

$150 - $180/hr

... Engineer to join our VHDLDepartment ... In this role, you will oversee definition, design, verification, and documentation forFPGA/ASIC ...

GlobalFoundries inc.

$167 - $275/hr

## PMTS ASIC Digital Design IP ENGINEERINGApplylocations: Santa Claratime type: Full timeposted on ... The PMTS Digital Design Engineer will lead the architecture implementation, microarchitecture ...

Qualcomm

$120 - $180/hr

Implement engineering change orders (ECOs) and support design convergence through sign-off ... ASIC/SoC Physical Design implementation.* Place and Route using Cadence Innovus and/or Synopsys ...

New

NVIDIA Corporation

$136 - $265/hr

We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... Experience in physical design and optimization e.g., synthesis, placement, routing, logic ...

Google Inc.

$207 - $300/hr

Software Engineer Manager II, Google WorkspaceAdvanced Experience owning outcomes and decision ... Design new product features toserve a small business use case. * Partner with peer managers and ...

Google Inc.

$307 - $427/hr

Bachelor's degree in Computer Science, Engineering, or a related technical field, or equivalent ... Google's secure-by-design development platforms and code integrity systems, ensuring our core ...

New

Qualcomm

$285 - $427/hr

Engineering Group, Engineering Group > CPU Engineering**General Summary:**Qualcomm Data Center team ... Strong fundamentals in digital ASIC design and power of CMOS circuits* Strong technical ...

New

Google Inc.

$132 - $189/hr

Combining experimental design and programming, you will improve UX and extract patterns from large datasets while setting high technical standards for the research community. Google Ads is helping ...

Programmers.io

Cloud Security Engineer

Louisville, KY · On-site

$53.50 - $71.50/hr

Roles & Responsibilities Design, implement, and manage cloud-native network security controls in ... Experience securing workloads in AKS (Azure Kubernetes Service) and GKE (Google Kubernetes Engine)

SPACE EXPLORATION TECHNOLOGIES CORP

$180 - $230/hr

Design, simulate and model RF/analog/mixed-signal circuits and systems * Derive specifications for ... Work with system architects, modem/DSP and ASIC engineers to partition functions between hardware ...

New

General Motors

$202 - $310/hr

As a Senior Systems Integration Engineer - Enterprise Transformation, you will design, build, and ... Working from the Software/Core IT side of the transformation, **you will focus on connecting Google ...

New

TetraMem Inc.

$230 - $300/hr

Oversee the design, development, integration, and optimization of embedded software for real-time ... Guide firmware development for FPGA and ASIC platforms, ensuring robust hardware/software ...

New

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All JobsGoogle Asic Design Engineer JobsGoogle Asic Design Engineer Jobs in Kentucky

Google Asic Design Engineer information

See Kentucky salary details

$81.6K

$130.4K

$175.4K

How much do google asic design engineer jobs pay per year?

As of Aug 18, 2026, the average yearly pay for google asic design engineer in Kentucky is $130,449.00, according to ZipRecruiter salary data. Most workers in this role earn between $114,200.00 and $156,300.00 per year, depending on experience, location, and employer.

What does a Google ASIC Design Engineer do?

A Google ASIC Design Engineer is responsible for designing and developing custom integrated circuits, known as Application-Specific Integrated Circuits (ASICs), that power Google's data centers, cloud infrastructure, and consumer devices. Their work involves collaborating with cross-functional teams to define requirements, create architecture, perform logic and physical design, and validate the silicon before production. They use advanced design tools and methodologies to ensure high performance, low power consumption, and reliability. Ultimately, their contributions help improve the efficiency and capabilities of Google's hardware products.

How does a Google ASIC Design Engineer typically collaborate with cross-functional teams during the chip development process?

As a Google ASIC Design Engineer, you will work closely with teams such as architecture, verification, software, and hardware validation to ensure successful chip delivery. Collaboration often involves regular meetings to align on design specifications, resolve integration issues, and discuss performance optimization. Effective communication is essential, as you’ll need to translate requirements from system architects into detailed hardware designs and provide feedback to verification and validation teams. This cross-functional interaction fosters a dynamic work environment and helps ensure the final product meets Google's rigorous standards.

What are the key skills and qualifications needed to thrive as a Google ASIC Design Engineer, and why are they important?

To thrive as a Google ASIC Design Engineer, you need a strong background in electrical engineering, digital logic design, and experience with ASIC development, typically backed by a relevant degree. Familiarity with hardware description languages (such as Verilog or VHDL), EDA tools (like Synopsys or Cadence), and an understanding of SoC architectures are essential, and related certifications can be valuable. Strong problem-solving skills, attention to detail, and effective teamwork and communication abilities help set candidates apart. These skills are crucial for designing reliable, high-performance ASICs that meet Google's specifications and project timelines.

What is the difference between Google Asic Design Engineer vs Google FPGA Design Engineer?

AspectGoogle Asic Design EngineerGoogle FPGA Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering; experience in ASIC designBachelor's/Master's in Electrical Engineering or Computer Engineering; FPGA design experience
Work EnvironmentDesigning custom silicon chips for Google productsDeveloping and testing FPGA prototypes for hardware acceleration
Employer & Industry UsagePrimarily in semiconductor and hardware design teams at GoogleHardware prototyping and acceleration teams at Google

The main difference between a Google Asic Design Engineer and a Google FPGA Design Engineer lies in their focus: ASIC engineers design custom chips for optimized performance, while FPGA engineers develop flexible hardware prototypes using field-programmable gate arrays. Both roles require strong electrical engineering skills but serve different stages of hardware development.

Are Google ASIC Design Engineers in demand?

ASIC Design Engineers at Google are in high demand due to the growing need for specialized hardware acceleration and efficient chip designs in data centers and AI applications. Skills in digital design, verification, and hardware description languages like Verilog or VHDL are highly valued, and the role often requires experience with EDA tools and FPGA prototyping. The demand is expected to remain strong as companies continue to develop custom chips for performance and energy efficiency.

How much does a Google ASIC Design Engineer make?

A Google ASIC Design Engineer typically earns a base salary ranging from $120,000 to $200,000 annually, with total compensation often including bonuses and stock options. Compensation varies based on experience, location, and level within the company, and the role requires expertise in hardware design, verification, and EDA tools.

What is the salary of Google ASIC Design Engineer in Google?

The salary for a Google ASIC Design Engineer typically ranges from $120,000 to $200,000 annually, depending on experience, location, and level within the company. Compensation may also include bonuses, stock options, and benefits, reflecting industry standards for specialized hardware design roles at major tech companies.

What are popular job titles related to Google Asic Design Engineer jobs in Kentucky?

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What job categories do people searching Google Asic Design Engineer jobs in Kentucky look for?

The top searched job categories for Google Asic Design Engineer jobs in Kentucky are:

What cities in Kentucky are hiring for Google Asic Design Engineer jobs?

Cities in Kentucky with the most Google Asic Design Engineer job openings:

Google Asic Design Engineer jobs near you
Infographic showing various Google Asic Design Engineer job openings in Kentucky as of August 2026, with employment types broken down into 6% As Needed, 72% Full Time, and 22% Contract. Highlights an 94% In-person, and 6% Remote job distribution, with an average salary of $130,449 per year, or $62.7 per hour.

Senior ASIC Design Engineer

Atom Computing, Inc.

On-site

$140 - $175/hr

Other

Medical, Dental, Vision, Life, Retirement, PTO

Posted 2 days ago

New

Job description

At Atom Computing, we build quantum computers using arrays of optically trapped neutral atoms that will empower customers to achieve unprecedented computational breakthroughs. Join a world-class team of scientists, engineers, and business professionals to advance the state-of-the-art in quantum computing.

Atom Computing is seeking a Senior ASIC Designer to design and develop a digital signal processing (DSP) block for our quantum computing systems. You will own the design from requirements definition through silicon bring-up, making key trade-offs across performance, power, area, and system integration constraints.

Reporting to the ASIC Team Lead, you will work closely with cross-functional teams to translate evolving system requirements into production-ready designs. This role requires deep ASIC development expertise, strong systems thinking, and the ability to independently drive complex design work while maintaining alignment with broader system and product goals.

Due to the need for collaboration with Atom’s theory, software, hardware, and optics teams, this role is required to be in the office in Austin, TX or Boulder, CO at least 3 days per week.

Job Responsibilities
  • Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration.
  • Work closely with Atom Computing’s quantum physicists, optical engineers, hardware and software engineers to understand use cases and deliver hardware that addresses the needs.
  • Participate in the design and development of current FPGA designs. Influence the FPGA design and development process to prepare for ASIC design.
Experience & Education
  • MS or PhD in Electrical Engineering, or related field.
  • 5+ years of post-degree experience as a hardware engineer.
Qualifications
  • Have gone through a complete ASIC design cycle
  • Experience in digital signal processing algorithms
  • Proficiency with RTL (SystemVerilog preferred)
  • Experience in implementing large digital signal processing blocks in RTL
  • Knowledge of Cadence, Synopsys, or Siemens EDA design tools
  • Expertise in FPGA, microprocessor, and related digital circuit design and functions

$140,000 - $175,000 a year

Atom Computing provides a wide variety of perks and benefits, including fully paid medical, dental, and vision insurance for our employees and their dependents.

  • Unlimited paid time off
  • 401K company matching
  • Short- and long-term disability
  • FSA
  • Dependent care benefits
  • Life insurance

We also offer drinks, snacks, and catered team lunches in our offices, every day!

The base salary range for this position is between $140,000 - $175,000, commensurate with experience. In addition to salary, we offer an annual bonus and equity in the company.

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