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Functional Verification Engineer Jobs (NOW HIRING)

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Verification Engineer

Santa Clara, CA · On-site

$160K/yr

... in need of Verification Engineers. Lets talk about what you want next! ASIC Verification ... You'll also support gate level functional verification, run regressions, handle bug tracking ...

Altera

Senior Debug Verification Engineer

San Jose, CA · On-site

$149K - $215K/yr

About the Role As a Sr. Debug Design Verification Engineer, you will be responsible for Design for ... Coordinate cross functional efforts with Design, SW, Architecture team to achieve full coverage ...

Baidu USA

Design Verification Engineer

Sunnyvale, CA · On-site

$159K - $194K/yr

Run RTL and gate level functional verification, debug failures, lead bug tracking, and analyze and close coverage. Work closely with the design and systems engineering teams to review specifications ...

Baidu USA

Design Verification Engineer

Sunnyvale, CA · On-site

$159K - $194K/yr

Run RTL and gate level functional verification, debug failures, lead bug tracking, and analyze and close coverage. Work closely with the design and systems engineering teams to review specifications ...

ChipAgents

Formal Verification Engineer

San Jose, CA · On-site

$250/hr

Our platform accelerates RTL development, functional verification, and simulation--unlocking new ... In this role, you will work closely with our AI engineering, research, and EDA teams to build ...

Cirrus Logic

Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

You will be responsible for end-to-end functional verification across block-level and chip-level ... Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a related field.

Altera

Senior Debug Verification Engineer

San Jose, CA · On-site

$149K - $215K/yr

About the Role As a Sr. Debug Design Verification Engineer , you will be responsible for Design for ... Coordinate cross functional efforts with Design, SW, Architecture team to achieve full coverage ...

SiFive, Inc.

WI · On-site

$124K - $152K/yr

SiFive is looking for a Senior Design Verification Engineer to drive functional verification of high-performance CPU core units.This role focuses on high-performance out-of-order core verification ...

Cirrus Logic

Senior Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

You will be responsible for end-to-end functional verification across block-level and chip-level ... Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a related field.

Cirrus Logic

Staff Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

You will be responsible for end-to-end functional verification across block-level and chip-level ... Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a related field.

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Functional Verification Engineer information

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$80K

$142.6K

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How much do functional verification engineer jobs pay per year?

As of Sep 11, 2026, the average yearly pay for functional verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

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Infographic showing various Functional Verification Engineer job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 88% Full Time, 6% Part Time, and 5% Contract. Highlights an 86% Physical, 5% Hybrid, and 9% Remote job distribution, with an average salary of $142,619 per year, or $68.6 per hour.

Design Verification Engineer (San Jose)

San Jose, CA • On-site

Quest Global
See more jobs at Quest Globalexternal

$120K/yr

Full-time

This job post has expired 2 days ago. Applications are no longer accepted.

Quest Global rating

7.8

Company rating: 7.8 out of 10

Based on 11 frontline employees who took The Breakroom Quiz

Job description

Join to apply for the Design Verification Engineer role at Quest Global

Quest Global delivers world‑class end‑to‑end engineering solutions by leveraging deep industry knowledge and digital expertise. The company solves complex challenges across aerospace & defense, automotive, energy, hi‑tech, healthcare, medical devices, rail and semiconductor industries.

What You Will Do
  • Verify the functional correctness of SoC, contributing to a team that writes test plans and defines test methodologies.
  • Collaborate with designers and architects to understand design specifications and build functional verification strategy.
  • Work with the Emulation/FPGA team to understand verification collaterals required for driving stimulus at the board level.
  • Collaborate with engineers in architecture, design, verification, implementation, modeling, performance analysis, silicon validation, FPGA and board development.
What You Will Bring
  • Experience in block/IP/sub‑system level verification of SoC IPs and peripherals, with ARM based boot environment preferred.
  • Knowledge of ARM architecture and AMBA bus standards like AXI‑4.
  • Experience with industry‑standard interfaces such as PCIe (preferably Gen‑6) and NVMe 2.0.
  • Experience coding UVM SoC/sub‑system level test benches, BFM, scoreboards, and monitors.
  • Proficiency in writing and debugging tests in UVM and C.
Experience & Education

• Bachelor’s degree in Electrical Engineering or a related field. 10+ years of experience (MS or PhD beneficial).

Pay Range

$120,000 – $190,000 K

Work Requirements
  • Position is on‑site in Santa Clara, California.
  • You must be able to commute to and from the location with your own transportation arrangements.
Seniority Level

Mid‑Senior level

Employment Type

Full‑time

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