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Full Time Vhdl Jobs (NOW HIRING)

Senior FPGA Design Engineer

Melbourne, FL ยท On-site

$120K - $150K/yr

Exempt / Full-time Salary Range: $120k - $150k Annually ROLE We are seeking a Senior FPGA Design ... REQUIRED SKILLS * Strong proficiency in RTL design using Verilog/VHDL, including custom ...

Senior FPGA Design Engineer

Greenville, SC ยท On-site

$120K - $150K/yr

Exempt / Full-time Salary Range: $120k - $150k Annually ROLE We are seeking a Senior FPGA Design ... REQUIRED SKILLS * Strong proficiency in RTL design using Verilog/VHDL, including custom ...

Senior FPGA Design Engineer

Greenville, SC ยท On-site

$120K - $150K/yr

Exempt / Full-time Salary Range: $120k - $150k Annually ROLE We are seeking a Senior FPGA Design ... REQUIRED SKILLS * Strong proficiency in RTL design using Verilog/VHDL, including custom ...

Firmware Engineer

Lexington, MA ยท On-site

$129K - $171K/yr

Designing, architecting, simulating, and integrating VHDL designs into FPGAs or Systems on Chip ... Highly competitive equity grants are included in the majority of full time offers; and are ...

General Summary This full-time position is in the Systems Development Department of Kratos SRE and ... Verilog/VHDL * 5+ years of experience with FPGAs with knowledge of Verilog/VHDL * 5+ years of ...

Senior Embedded Engineer

Hudson, NH ยท On-site

$165K - $218K/yr

Designing, architecting, simulating, and integrating VHDL designs into FPGAs or Systems on Chip ... Highly competitive equity grants are included in the majority of full time offers; and are ...

Senior Firmware Engineer

Hudson, NH ยท On-site

$165K - $218K/yr

Designing, architecting, simulating, and integrating VHDL designs into FPGAs or Systems on Chip ... Highly competitive equity grants are included in the majority of full time offers; and are ...

Design Verification Engineer

San Diego, CA ยท On-site

$144K - $176K/yr

Design Verification Engineer Job Type : Full time Location : San Diego And Bay Area : Strong ... Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting. Additional Information All your information will ...

FPGA Engineer

Tampa, FL ยท On-site

$122K - $157K/yr

Description Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded ... cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S.

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Full Time Vhdl information

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How much do full time vhdl jobs pay per year?

As of Jun 16, 2026, the average yearly pay for full time vhdl in the United States is $76,639.00, according to ZipRecruiter salary data. Most workers in this role earn between $45,500.00 and $130,000.00 per year, depending on experience, location, and employer.

What is the difference between Full Time Vhdl vs Full Time FPGA Designer?

AspectFull Time VhdlFull Time FPGA Designer
Required CredentialsBachelor's in Electrical Engineering or related; VHDL certification beneficialBachelor's in Electrical Engineering or related; FPGA design certifications advantageous
Work EnvironmentDesign and simulation of digital systems, coding in VHDLDesign, implementation, and testing of FPGA hardware, coding in VHDL/Verilog
Industry UsageUsed across semiconductor, aerospace, and electronics industriesPrimarily in electronics, telecommunications, and embedded systems

Full Time Vhdl roles focus on coding and simulation of digital systems using VHDL, often in a variety of industries. Full Time FPGA Designer positions involve broader hardware design, including implementation and testing of FPGA circuits, with VHDL as a core skill. Both roles require similar credentials but differ in scope and responsibilities.

What cities are hiring for Full Time Vhdl jobs? Cities with the most Full Time Vhdl job openings:
What are the most commonly searched types of Vhdl jobs? The most popular types of Vhdl jobs are:
Senior FPGA Design Engineer

Senior FPGA Design Engineer

AERONIX INC

Melbourne, FL โ€ข On-site

$120K - $150K/yr

Full-time

Posted 6 days ago


Job description


Job Title: Senior FPGA Engineer
Department: Engineering
Reports To: Functional Team Lead / Program Manager
FLSA Status: Exempt / Full-time

Salary Range: $120k - $150k Annually

ROLE

We are seeking a Senior FPGA Design Engineer with at least 10 years of experience to develop the architecture, implementation, and verification of complex, high-speed FPGA solutions. The ideal candidate will have deep expertise in high-bandwidth interfaces such as PCIe Gen4/5, 10 to 100G+ Ethernet, and DDR4/DDR5, along with strong skills in RTL design (VHDL/Verilog/ SystemVerilog), timing closure, and signal integrity. Experience with Cryptography, DSP and RF applications is strong plus. This role involves driving FPGA design from concept through production, integrating vendor IP, optimizing for low latency and high throughput, and performing rigorous verification and lab validation. The engineer will collaborate across hardware and software teams, mentor junior engineers, and ensure designs meet stringent reliability and compliance standards.

RESPONSIBILITIES

  • Lead full life-cycle FPGA development, from requirements and architecture through RTL implementation (Verilog/VHDL), verification, and system integration across multiple FPGA families.
  • Define and document FPGA architecture, including block diagrams, clocking strategies, and trade-off analyses; participate in and conduct design reviews.
  • Develop robust, reusable, and self-checking testbenches; implement functional coverage models and achieve code coverage closure.
  • Create and execute detailed test plans, procedures, and reports; ensure verification rigor and traceability.
  • Collaborate with hardware and software teams to integrate FPGA designs at the board and system level; support lab bring-up, debug, and qualification testing.
  • Implement and validate JTAG boundary scan and other DFT features; ensure compliance with design-for-test and reliability standards.
  • Drive continuous improvement in design practices, coding standards, and verification methodologies; mentor junior engineers and contribute to technical reviews.

REQUIRED SKILLS

  • Strong proficiency in RTL design using Verilog/VHDL, including custom implementations beyond vendor IP integration.
  • Strong experience in testbench development, functional coverage, and verification of complex FPGA designs.
  • Proficient with FPGA simulation and synthesis tools (e.g., QuestaSim, ModelSim, Riviera-PRO, Xilinx Vivado, Intel Quartus).
  • Proficiency of FPGA architecture and optimization techniques for timing closure, floor-planning, and resource utilization.
  • Ability to perform FPGA power estimation and analysis using vendor tools and optimize designs for power and thermal constraints.
  • Strong understanding of high-speed interfaces (PCIe, Ethernet, Serial RapidIO, DDRx) and control protocols (IยฒC, SPI, RS-232/422).
  • Experience with System-on-Chip technologies.

PREFERRED SKILLS

  • Proficiency in FPGA Block Design development and debugging (e.g., Vivado, Libero).
  • Familiarity with Universal Verification Methodology (UVM).
  • Familiarity with Microsemi Libero and Lattus Diamond.
  • Familiarity with revision control systems (Git/Bitbucket) and scripting in Python, TCL, or Linux shell for automation.
  • Skilled in FPGA lab validation using oscilloscopes, logic analyzers, and protocol analyzers.
  • Support JTAG Boundary scan design and testing
  • Experience with Cryptography, Digital Signal Processing and RF Applications
  • MATLAB modeling
  • Strong oral and written communication skills, with ability to document and present technical work clearly.
  • Experience collaborating in Agile environments and using tools like Jira and requirements management systems (e.g., Jama).
  • Familiarity with Manufacturing processes, and Electronic Stress Screening.
  • Understanding of formal verification processes and compliance standards.

QUALIFICATIONS

  • Bachelorโ€™s Degree in Electrical Engineering, Computer Engineering, or related field.
  • Minimum 10 years of relevant experience in FPGA design.
  • Excellent written and verbal communication skills.
  • Ability to work in a collaborative team environment.
  • US Person required; ability to obtain and maintain a DoD Secret clearance.
  • Position located in Melbourne, FL or Greenville, SC (not remote).