NVIDIA is seeking an ASIC Verification Engineer to verify the design and implementation of the ... Developing tools to manage and improve verification processes. * Collaborating with architects ...
NVIDIA is seeking an ASIC Verification Engineer to verify the design and implementation of the ... Developing tools to manage and improve verification processes. * Collaborating with architects ...
ASIC Design Verification Engineer
$200K - $350K/yr
Role Overview As an ASIC Design Verification Engineer, you will play a critical role in ensuring ... Manage verification schedules, deliverables, and risk mitigation plans Required Qualifications
ASIC Design Verification Engineer
$200K - $350K/yr
Role Overview As an ASIC Design Verification Engineer, you will play a critical role in ensuring ... Manage verification schedules, deliverables, and risk mitigation plans Required Qualifications
Principal ASIC Design Verification Engineer
OR · On-site +1
$190K - $285K/yr
Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ... in ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, DFT ...
Principal ASIC Design Verification Engineer
OR · On-site +1
$190K - $285K/yr
Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ... in ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, DFT ...
Principal ASIC Design Verification Engineer
Seattle, WA · On-site
$190K - $285K/yr
Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ... in ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, DFT ...
Principal ASIC Design Verification Engineer
Seattle, WA · On-site
$190K - $285K/yr
Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ... in ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, DFT ...
Senior ASIC verification engineer This role has been designed as ''Onsite' with an expectation that ... We have the flexibility to manage our work and personal needs.We make bold moves, together, and are ...
Senior ASIC verification engineer This role has been designed as ''Onsite' with an expectation that ... We have the flexibility to manage our work and personal needs.We make bold moves, together, and are ...
SR ASIC Design Verification Engineer
San Jose, CA · On-site
$165K - $241K/yr
Participate in the ASIC design verification for Cisco high-end switching products. * Architect ... for full-time employees * Exempt employees participate in Cisco's flexible vacation time off ...
SR ASIC Design Verification Engineer
San Jose, CA · On-site
$165K - $241K/yr
Participate in the ASIC design verification for Cisco high-end switching products. * Architect ... for full-time employees * Exempt employees participate in Cisco's flexible vacation time off ...
ASIC Design Verification Engineering Leader
San Jose, CA · On-site
$214K - $309K/yr
As an ASIC Design Verification Leader, you will play a pivotal role in driving Cisco's next ... for full-time employees * Exempt employees participate in Cisco's flexible vacation time off ...
ASIC Design Verification Engineering Leader
San Jose, CA · On-site
$214K - $309K/yr
As an ASIC Design Verification Leader, you will play a pivotal role in driving Cisco's next ... for full-time employees * Exempt employees participate in Cisco's flexible vacation time off ...
SR ASIC Design Verification Engineer
San Jose, CA · On-site
$165K - $241K/yr
Participate in the ASIC design verification for Cisco high-end switching products. * Architect ... for full-time employees * Exempt employees participate in Cisco's flexible vacation time off ...
SR ASIC Design Verification Engineer
San Jose, CA · On-site
$165K - $241K/yr
Participate in the ASIC design verification for Cisco high-end switching products. * Architect ... for full-time employees * Exempt employees participate in Cisco's flexible vacation time off ...
ASIC Design Verification Engineer
San Jose, CA · On-site
$165K - $241K/yr
Participate in the ASIC design verification for Cisco high-end switching products. * Perform end-to ... for full-time employees * Exempt employees participate in Cisco's flexible vacation time off ...
ASIC Design Verification Engineer
San Jose, CA · On-site
$165K - $241K/yr
Participate in the ASIC design verification for Cisco high-end switching products. * Perform end-to ... for full-time employees * Exempt employees participate in Cisco's flexible vacation time off ...
... ASIC / FPGA verification flow * Contribute to engineering estimates for new program pursuits ... Experience using revision control systems such as Git or Subversion to manage source code ...
... ASIC / FPGA verification flow * Contribute to engineering estimates for new program pursuits ... Experience using revision control systems such as Git or Subversion to manage source code ...
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to lead verification strategy and execution for custom silicon p.
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to lead verification strategy and execution for custom silicon p.
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to lead verification strategy and execution for custom silicon p.
Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to lead verification strategy and execution for custom silicon p.
ASIC Design Verification Engineer
$165K - $241K/yr
Participate in the ASIC design verification for Cisco high-end switching products. * Perform end-to ... for full-time employees * Exempt employees participate in Cisco's flexible vacation time off ...
ASIC Design Verification Engineer
$165K - $241K/yr
Participate in the ASIC design verification for Cisco high-end switching products. * Perform end-to ... for full-time employees * Exempt employees participate in Cisco's flexible vacation time off ...
Principal ASIC Design Verification Engineer
Seattle, WA · On-site
$190K - $285K/yr
Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ... in ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, DFT ...
Quick apply
Principal ASIC Design Verification Engineer
Seattle, WA · On-site
$190K - $285K/yr
Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ... in ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, DFT ...
Principal ASIC Design Verification Engineer
Seattle, WA · On-site
$190K - $285K/yr
Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ... in ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, DFT ...
Principal ASIC Design Verification Engineer
Seattle, WA · On-site
$190K - $285K/yr
Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ... in ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, DFT ...
Principal ASIC Design Verification Engineer
Los Angeles, CA · On-site
$190K - $285K/yr
Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ... in ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, DFT ...
Quick apply
Principal ASIC Design Verification Engineer
Los Angeles, CA · On-site
$190K - $285K/yr
Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ... in ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, DFT ...
Principal ASIC Design Verification Engineer
$190K - $285K/yr
Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ... in ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, DFT ...
Principal ASIC Design Verification Engineer
$190K - $285K/yr
Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and ... in ASIC/SoC verification. * Solid understanding of SystemVerilog, digital logic, RTL design, DFT ...
Senior ASIC Verification Engineer This role has been designed as ''Onsite' with an expectation that ... We have the flexibility to manage our work and personal needs.We make bold moves, together, and are ...
Senior ASIC Verification Engineer This role has been designed as ''Onsite' with an expectation that ... We have the flexibility to manage our work and personal needs.We make bold moves, together, and are ...
Senior ASIC verification engineer This role has been designed as ''Onsite' with an expectation that ... We have the flexibility to manage our work and personal needs. We make bold moves, together, and ...
Senior ASIC verification engineer This role has been designed as ''Onsite' with an expectation that ... We have the flexibility to manage our work and personal needs. We make bold moves, together, and ...
Senior ASIC Verification Engineer This role has been designed as ''Onsite' with an expectation that ... We have the flexibility to manage our work and personal needs.We make bold moves, together, and are ...
Senior ASIC Verification Engineer This role has been designed as ''Onsite' with an expectation that ... We have the flexibility to manage our work and personal needs.We make bold moves, together, and are ...
Full Time Asic Verification Manager information
What is the difference between Full Time Asic Verification Manager vs Full Time Digital Design Engineer?
| Aspect | Full Time Asic Verification Manager | Full Time Digital Design Engineer |
|---|---|---|
| Primary Focus | Managing verification teams and processes for ASICs | Designing digital circuits and logic for ASICs |
| Required Skills | Verification methodologies, team leadership, scripting | Hardware description languages, digital logic design |
| Work Environment | Verification labs, team collaboration | Design studios, simulation environments |
| Industry Usage | Common in semiconductor companies, EDA firms | Used across chip design companies, tech firms |
The Full Time Asic Verification Manager primarily oversees verification teams and processes, ensuring ASICs meet specifications. In contrast, the Full Time Digital Design Engineer focuses on creating the digital logic and circuits. Both roles require strong technical skills, but their responsibilities differ significantly in scope and focus within the ASIC development lifecycle.
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Full-time
Re-posted 25 days ago
Nvidia rating
9.6
Based on 17 frontline employees who took The Breakroom Quiz
7th of 244 rated software companies
Job description
NVIDIA is seeking an ASIC Verification Engineer to verify the design and implementation of the world's leading SOCs and GPUs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
What you'll be doing:
Verifying the ASIC design, architecture, golden models and micro-architecture of GPU and SoC units using Emulation and Prototyping platforms.
Understanding the design, defining the verification scope, developing the verification infrastructure, and verifying the correctness of the RTL design.
Developing tools to manage and improve verification processes.
Collaborating with architects, designers, and software teams to accomplish your tasks.
What we need to see:
Recent graduate with BS or MS in Electrical/Computer Engineering, Computer Science, or equivalent experience.
Hardware engineering background with knowledge of Digital Design, VLSI, and/or Computer Architecture.
Exposure to design and verification tools (VCS or equivalent simulator tools; debug tools like Verdi, Debussy, GDB).
Background in building testbench environments for unit level verification.
Expertise in System Verilog and Verilog.
C++ programming language experience and Perl/Python scripting knowledge.
Excellent debugging, analytical, and problem-solving skills.
Ways to stand out from the crowd:
Experience with PCIe and Memory protocols is highly desirable.
NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Come join our Emulation team and help us build future interconnect architectures that will continue to drive us forward in the fields of High Performance Computing, Graphics and AI.
You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US
Year founded
1993