Position: Digital IC Design Lead (PMIC & Mixed-Signal)
Location: Santa Clara, CA
Type: Full-time | Onsite
Job Summary
We are seeking an experienced
Digital Design Lead to lead the digital architecture, RTL development, and mixed-signal integration of Power Management ICs (PMICs). This role is responsible for driving digital design from architecture through tape-out, collaborating with analog, verification, and firmware teams to deliver high-performance, low-power mixed-signal IC solutions.
Key Responsibilities
- Define and document digital architecture and micro-architecture for PMIC digital cores, including power sequencing and fault management.
- Lead mixed-signal integration with analog teams and define digital interfaces and control loops.
- Design high-quality, low-power RTL using SystemVerilog/Verilog for PWM controllers, I2C, SPI, PMBus, I3C, and OTP/MTP memory controllers.
- Drive Design for Test (DFT) implementation, including scan chains, ATPG, and BIST.
- Develop verification strategies and support mixed-signal simulations using Verilog-AMS or Real Number Modeling (RNM).
- Lead synthesis, Logic Equivalency Checking (LEC), Clock Domain Crossing (CDC), and Static Timing Analysis (STA) to ensure timing closure and design quality.
- Collaborate with cross-functional teams to ensure successful IC integration, validation, and tape-out.
- Mentor and provide technical leadership to digital design engineers.
Required Qualifications
- Bachelor's or Master's degree in Electrical or Computer Engineering.
- 10+ years of digital IC design experience, including 5+ years focused on PMIC or mixed-signal products.
- Strong expertise in SystemVerilog/Verilog RTL design for synthesis.
- Hands-on experience with digital control loops for power converters.
- Experience with mixed-signal integration and PMIC digital architecture.
- Proficiency with Cadence (Genus/Tempus) or Synopsys (Design Compiler/PrimeTime) toolsets.
- Knowledge of BCD process technologies, Clock Domain Crossing (CDC), Static Timing Analysis (STA), and Logic Equivalency Checking (LEC).
- Experience with Design for Test (DFT), including scan insertion, ATPG, and BIST.
- Strong debugging, verification, analytical, and problem-solving skills.
Preferred Qualifications
- Master's degree in Electrical or Computer Engineering.
- Experience with firmware/software interaction for programmable PMICs.
- Proven experience leading and mentoring digital IC design teams.
- Successful track record of multiple mixed-signal/PMIC IC tape-outs.
- Experience with mixed-signal verification using Verilog-AMS or Real Number Modeling (RNM).