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Freelance Asic Rtl Design Engineer Jobs in Laurel, MD

DSP/FEC Engineer

Linthicum, MD · On-site

$141K - $164K/yr

DSP/FEC Engineer, Linthicum Heights, MD We are looking for multiple DSP/FEC Engineer candidates at ... Preferred Qualifications: - Familiarity with FPGA and RTL design including hardware description ...

DSP Communications Engineer

Linthicum, MD · On-site

$141K - $164K/yr

Minimum Qualifications: - Familiarity with FPGA and RTL design including hardware description languages (Verilog, System Verilog, VHDL). - Good knowledge and understanding across various engineering ...

Direct the application of ASIC and FPGA Place-and-Route (P&R) tools, engineering libraries, and physical implementation methodologies. * Oversee integration of new P&R tools, design libraries, and ...

Showing results 21-40

Freelance Asic Rtl Design Engineer information

See Laurel, MD salary details

$14

$47

$131

How much do freelance asic rtl design engineer jobs pay per hour?

As of Aug 23, 2026, the average hourly pay for freelance asic rtl design engineer in Laurel, MD is $47.30, according to ZipRecruiter salary data. Most workers in this role earn between $24.09 and $61.25 per hour, depending on experience, location, and employer.

Are freelance ASIC RTL design engineers in demand?

Freelance ASIC RTL design engineers are in demand due to the growing need for custom chip development in industries like telecommunications, AI, and consumer electronics. Skills in hardware description languages such as Verilog or VHDL, along with experience in FPGA prototyping, enhance employability in this flexible work arrangement.

How much does a Freelance ASIC RTL Design Engineer make?

Freelance ASIC RTL Design Engineers typically earn between $50 and $150 per hour, depending on experience, project complexity, and location. Rates can vary based on expertise in hardware description languages like Verilog or VHDL and familiarity with FPGA or ASIC design tools.

What cities near Laurel, MD are hiring for Freelance Asic Rtl Design Engineer jobs?

Cities near Laurel, MD with the most Freelance Asic Rtl Design Engineer job openings:

Infographic showing various Freelance Asic Rtl Design Engineer job openings in Laurel, MD as of August 2026, with employment types broken down into 59% Full Time, and 41% Contract. Highlights an 100% In-person job distribution, with an average salary of $98,383 per year, or $47.3 per hour.

Hardware Design Engineer - Level 3

Assertive Professionals

Hanover, MD • On-site

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 22 days ago


Job description

Assertive Professionals is in search of a Hardware Design Engineer to support our National Security Customer near Hanover, MD.

This is a Funded and immediate position, we are offering a salary range of $234,000-$224,000 and a $10,000 sign-on bonus, plus a $1,200 annual compliance bonus!

We offer an excellent benefits package, including PTO, 401k Match at 5%, Profit Sharing, Company paid Life Insurance, Dental, Vision, STD/LTD, and two options under a national medical plan with employee contribution.

Position Description:

Designs and tests new integrated circuits and hardware components for a wide variety of signal processing applications and research. Designs, documents, and develops code (to include firmware) for digital signal processors or other programmable hardware devices such as Application Specific Integrated Circuit (ASIC) and Field Programmable Gate Array (FPGA) hardware. Analyzes the function of existing integrated circuits and hardware components for the purpo~e of reverse engineering the hardware and firmware. Conducts the necessary hardware engineering and related functions to modify and adapt vendor-manufactured hardware to meet special Government needs and contingencies.

  • Assist with designing new products and processes and improving and maintaining existing products
  • Conduct design analysis on components and/or assemblies to assist in the development process by ensuring designs are cost efficient, able to be manufactured, and reliable
  • Communicate with the other engineering personnel to coordinate the interrelated design and assure project completion
  • Apply ASIC or FPGA place and route (P&R) tools with various libraries to create physical implementations of designs
  • Develop and maintain documentation for the P&R design flows(U) Assist with de-processing electronic components and retrieving stored firmware or software using approved reverse engineering procedures
  • Design new products and processes and improving and maintaining existing products
  • Integrate new P&R tools, P&R tool updates, and ASIC or FPGA design libraries into Government's computer aided design environment, documents the use of those tools and libraries, and Assist other physical designers to successfully complete their specific P&R design tasks
  • Work with tool and library vendors to develop solutions for designers' P&R design challenges
  • Perform the de-processing of electronic components and retrieving stored firmware or software using approved reverse engineering procedures
  • Lead the designs of new products and processes and improve and maintain existing products
  • Provide technical leadership to less experienced engineers
  • Perform the de-processing of electronic components and retrieving stored firmware or software using approved reverse engineering procedures and develops improved procedures
  • Direct and check the work of other hardware design engineers
  • Act as internal consultant providing technical guidance on most complex projects
  • Oversee the de-processing of electronic components and retrieving stored firmware or software using approved reverse engineering procedures
  • Develop novel procedures for reverse engineering of new component types

Required Experience and Qualifications:

  • TS/SCI with ability to pass a Polygraph
  • Twelve (12) years experience as a hardware design engineer in integrated circuit or microelectronic component design or reverse engineering of the same
  • Bachelor's degree in Electrical Engineering or Computer Engineering from an accredited college or university
    • Five (5) years of additional hardware design engineering experience may be substituted for a bachelor's degree
  • 14 Years of experience Programming in VHDL/FPGA 
  • Programming on Xilinx FPGAs - any combination of VIRTEX-II Pro, VIRTEX-4, VIRTEX-5, or VIRTEX-6 (8 years)
  • Programming on Linux platforms (5 years)
  • Experience with Xilinx ISE, Synplify Pro, and Modeltech's Modelsim (5 years)
  • Writing pin-level VHDL and clocking constraint files (8 years@ 50%)
  • Programming in one or more of the following scripting languages: PERL, sh, bash, csh, or python (1 year)
  • Using Linux or Unix for day-to-day activities (5 years)

Desired Experience and Qualifications:

  • None