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Freelance Asic Rtl Design Engineer Jobs in Alabama

NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's leading GPUs. This ... As a senior member of our verification team, you'll understand the design & implementation with ...

FPGA Development Engineer

Birmingham, AL · On-site

$121.80K - $156.50K/yr

PURPOSE We are seeking a mid-career FPGA Development Engineer to join our growing hardware ... Experience with RTL design in VHDL or Verilog. * Hands-on simulation and verification experience ...

... RTL and simulation assistance, system bring up and debug) * Collaborate with field and AMD Xilinx ... Experience with and understanding at systems level, FPGA and ASIC design tools. Experience with ...

FPGA Engineer

Huntsville, AL

$128.10K - $164.50K/yr

Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...

FPGA Engineer

Mobile, AL

$110.80K - $142.30K/yr

Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...

FPGA Engineer

Huntsville, AL · On-site

$128.10K - $164.50K/yr

Description Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...

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Freelance Asic Rtl Design Engineer information

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$121.80K - $156.50K/yr

Full-time

Posted 16 days ago


Job description

PURPOSE

We are seeking a mid-career FPGA Development Engineer to join our growing hardware development team. The ideal candidate has hands-on experience designing, implementing, and verifying complex digital logic using Xilinx FPGAs and the Vivado tool suite, along with a strong background in simulation and verification methodologies. You will work closely with cross-functional teams to architect, develop, and optimize FPGA-based solutions for high-performance embedded systems.

ROLE AND RESPONSIBILITIES

  • Design, implement, and integrate FPGA logic using Xilinx devices and the Vivado Design Suite.
  • Develop RTL (VHDL/Verilog/SystemVerilog) for high-performance, reliable digital systems.
  • Perform simulation, verification, and debugging using industry-standard tools (e.g., Vivado Simulator, ModelSim/Questa, Xilinx logic analyzers).
  • Optimize designs for timing closure, resource utilization, and power consumption.
  • Collaborate with firmware, hardware, and systems engineering teams to define requirements and ensure seamless system integration.
  • Create comprehensive design documentation, test plans, and verification reports.
  • Support bring-up, validation, and troubleshooting on real hardware platforms

PREFERRED SKILLS, QUALIFICATIONS AND EDUCATION REQUIREMENTS

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
  • 5 – 7 years of professional FPGA development experience.
  • Strong proficiency with Xilinx FPGA families (e.g., Zynq, Ultrascale/Ultrascale+).
  • Demonstrated experience with the Xilinx Vivado Design Suite, including synthesis, implementation, timing analysis, and IP integration.
  • Experience with RTL design in VHDL or Verilog.
  • Hands-on simulation and verification experience (Vivado Simulator, QuestaSim, ModelSim, etc.).
  • Strong understanding of digital design fundamentals (clocking, resets, CDC, pipelining, state machines).
  • Familiarity with version control systems (Git, SVN).
  • Experience with SystemVerilog or UVM-based verification.
  • Familiarity with embedded systems, processors, and board-level debugging tools.
  • Experience with high-speed interfaces (PCIe, DDR, SERDES, Ethernet).
  • Python, TCL, or shell scripting for automation and tool flows.
  • Experience working in Agile or structured development environments.

ADDITIONAL NOTES

What We Offer

  • Competitive salary and benefits package
  • Opportunities for technical growth and ownership of complex FPGA designs
  • Collaborative team environment with modern tools and development practices