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Flex Remote Design Verification Engineer Jobs (NOW HIRING)

ASIC Engineer, Design Verification Responsibilities: * Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification * Develop ...

ASIC Engineer, Design Verification Responsibilities: * Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification * Develop ...

The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define ...

The Role We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the ...

Marie.samayoa@capgemini.com SOC Design Verification Engineer Location: Redmond, WA Hybrid (Remote option allowed) Minimum Qualifications • Track record of 'first-pass success' in ASIC development ...

Design Verification

Chandler, AZ · Remote

$139K - $169K/yr

Experience with flow optimizations such as Grey/Black-boxing techniques Good at communicating requirements/issues with Implementation, PnR and Design teams. Working knowledge of Confluence ...

RTL Design and Verification

$139K - $169K/yr

Bachelor's degree in electrical engineering with 3+ experience or master's degree in electrical ... Micro-architecture definition of design features, test plan creation and functional verification.

US - UT - Remote (144200) Job Title: Core Engineering - Design Engineer V PCB Layout Engineer, AR ... Lead designs from kick-off through tape-out, encompassing rigid, rigid-flex, and flex PCBs for both ...

US - Remote Job Title: Core Engineering - Design Engineer V PCB Layout Engineer, AR Product Team As ... Lead designs from kick-off through tape-out, encompassing rigid, rigid-flex, and flex PCBs for both ...

Formal Verification Engineer

Mountain View, CA · On-site +1

$150K - $287K/yr

We build the full stack-from silicon and rack design through compilers, kernels, and ML models. We ... Remote Perks - We work remotely Monday & Friday, supported by home-tech setup and remote wifi ...

Design Engineer V

Sunnyvale, CA · On-site +1

$125 - $130/hr

US remote - Onsite work is a possibility, with a strong preference for Sunnyvale, California PCB ... Lead designs from kick-off through tape-out, encompassing rigid, rigid-flex, and flex PCBs for both ...

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Flex Remote Design Verification Engineer information

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$105.5K

$149.2K

$167K

How much do flex remote design verification engineer jobs pay per year?

As of Jul 13, 2026, the average yearly pay for flex remote design verification engineer in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.
What are the most commonly searched types of Remote Design Verification Engineer jobs? The most popular types of Remote Design Verification Engineer jobs are:
Infographic showing various Flex Remote Design Verification Engineer job openings in the United States as of July 2026, with employment types broken down into 89% Full Time, 8% Part Time, and 3% Contract. Highlights an 87% Physical, 3% Hybrid, and 10% Remote job distribution, with an average salary of $149,150 per year, or $71.7 per hour.
ASIC Engineer, Design Verification

ASIC Engineer, Design Verification

Meta

Sunnyvale, CA • On-site, Remote

$178K/yr

Full-time

Posted 13 days ago


Meta rating

7.5

Company rating: 7.5 out of 10

Based on 44 frontline employees who took The Breakroom Quiz

135th of 209 rated software companies


Job description

Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to drive verification strategy and execution for custom silicon powering Meta's data center infrastructure. In this role, you will lead the end-to-end verification of complex IP blocks and SoCs designed for AI/ML acceleration, networking, and video processing workloads. You will architect scalable UVM-based verification environments, define coverage models, and partner with design, emulation, and post-silicon validation teams to achieve first-pass silicon success across Meta's infrastructure ASIC portfolio.
ASIC Engineer, Design Verification Responsibilities:
  • Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification
  • Develop functional tests based on verification test plan
  • Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage
  • Debug, root-cause and resolve functional failures in the design, partnering with the Design team
  • Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality
  • Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry

Minimum Qualifications:
  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • 8+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification
  • 8+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies
  • Experience in one or more of the following areas along with functional verification-SV Assertions, Formal, Emulation
  • Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments
  • Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle

Preferred Qualifications:
  • Experience with compute and/or memory subsystem and/or collective functional and performance verification
  • Experience with verification of ARM/RISC-V/GPU based sub-systems or SoCs
  • Experience in development of UVM based verification environments from scratch
  • Prior experience with fullchip or package-level integration projects
  • Experience working across and building relationships with cross-functional design, model and emulation teams
  • Familiarity with host and system-level concepts for functional verification
  • Experience with chiplet based architectures and package-level integration verification

About Meta:
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.
$178,000/year to $250,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.

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