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Fifo Engineer Jobs in Arizona (NOW HIRING)

Forklift Operator

Tempe, AZ · On-site

$16.50 - $19.50/hr

Pulls and prepares product to be shipped using FIFO methodology when necessary. * Pulls all raw ... leading developer and manufacturer of all natural citrus based ingredient and beverage products ...

Forklift Operator

Tempe, AZ · On-site

$16.50 - $19.50/hr

Pulls and prepares product to be shipped using FIFO methodology when necessary. * Pulls all raw ... leading developer and manufacturer of all natural citrus based ingredient and beverage products ...

Mechanical Assembly & Shipping Technician

Phoenix, AZ · On-site

$17.50 - $21.75/hr

With interesting opportunities in engineering, marketing, sales, supply chain, operations, HR ... Apply FIFO (First-In, First-Out) inventory practices to ensure proper stock rotation and prevent ...

Material Handler I

Tucson, AZ · On-site

$16.25 - $19.50/hr

Parker's engineering expertise and broad range of core technologies uniquely positions the company ... FIFO) priority. * Accurately pull inventory stock items based on number, size, quantity, and ...

Material Handler I

Tucson, AZ · On-site

$16.25 - $19.50/hr

Parker's engineering expertise and broad range of core technologies uniquely positions the company ... FIFO) priority. * Accurately pull inventory stock items based on number, size, quantity, and ...

Our scope spans Engineering, prototype builds, through full production, requiring teams that can ... FIFO controls where applicable, and flow to production. * Partner with Materials Planning ...

New

Inventory Control Specialist

Surprise, AZ · On-site

$17.25 - $22.25/hr

... and engineering inquiries promptly • Support plant teams with periodic physical inventory count as required by the business • Proactively check that inventories are being utilized in a FIFO ...

Team Leader Material Handling

Mesa, AZ · On-site

$18 - $23/hr

As an engineering and manufacturing partner, Magna's Complete Vehicle group helps traditional OEMs ... counting, FIFO compliance, and timely transaction processing within SAP/WMS systems. * Ensure ...

As an engineering and manufacturing partner, Magna's Complete Vehicle group helps traditional OEMs ... counting, FIFO compliance, and timely transaction processing within SAP/WMS systems. * Ensure ...

Fifo Engineer information

See Arizona salary details

$25.7K

$85.8K

$164.6K

How much do fifo engineer jobs pay per year?

As of Aug 1, 2026, the average yearly pay for fifo engineer in Arizona is $85,844.00, according to ZipRecruiter salary data. Most workers in this role earn between $46,602.00 and $116,019.00 per year, depending on experience, location, and employer.

Can Americans get FIFO jobs?

Fifo Engineer roles are typically based in regions with significant resource extraction industries, such as Australia and Canada. Americans can apply for FIFO jobs if they meet the required work visas, certifications, and experience, but employment depends on employer requirements and immigration regulations.

What is a FIFO Engineer job?

A FIFO (Fly-In Fly-Out) Engineer is a professional who works on a rotational basis, typically in remote locations such as mining sites, oil and gas projects, or infrastructure developments. They travel to the worksite for a set period (e.g., two weeks on, one week off) and then return home during their off time. FIFO Engineers are responsible for designing, maintaining, and optimizing engineering projects while adhering to strict safety and operational standards. This role often involves long hours, challenging environments, and collaboration with multidisciplinary teams. The FIFO schedule provides a structured work-life balance but requires adaptability and resilience.

What are the key skills and qualifications needed to thrive in the Fifo Engineer position, and why are they important?

To thrive as a FIFO (Fly-In Fly-Out) Engineer, you require a relevant engineering degree, strong technical expertise in your discipline (such as mining, mechanical, or civil), and proven problem-solving abilities. Familiarity with industry standard software (e.g., AutoCAD, SAP) and certifications like safety inductions or site-specific tickets are typically expected. Exceptional communication, adaptability to remote work environments, and resilience in high-pressure situations are key soft skills for this role. These competencies ensure you can deliver quality engineering solutions while maintaining safety and efficiency on rotational work schedules in remote project locations.

What engineers make $500,000?

Senior engineers in specialized fields such as petroleum, aerospace, or software engineering can earn $500,000 or more annually, especially with experience, advanced skills, and leadership roles. High compensation often includes bonuses, stock options, or profit sharing, particularly in large corporations or high-demand industries.

What should I expect from the work schedule and lifestyle as a FIFO Engineer?

As a FIFO Engineer, you will work in a rotational roster, commonly spending several weeks on-site followed by a set period off-site, which can affect your work-life balance and personal routines. You will typically live in provided accommodations and may work longer shifts in remote locations, fostering close teamwork and reliance on your colleagues. While being away from home can be challenging, the role often comes with above-average compensation and unique opportunities to work on major projects. It's important to be prepared for the physical and mental demands, but many find the camaraderie and career advancement prospects rewarding.

What do FIFO engineers do?

FIFO engineers are responsible for designing, maintaining, and optimizing FIFO (First-In, First-Out) systems used in manufacturing, logistics, or inventory management to ensure proper product flow and stock rotation. They often work with automation tools, control systems, and require knowledge of process engineering and safety protocols.

How much do FIFO engineers make?

FIFO engineers typically earn between $70,000 and $120,000 annually, depending on experience, location, and the complexity of the projects. They often work in remote or offshore environments, requiring skills in pipeline design, safety protocols, and industry standards.
What are the most commonly searched types of Fifo Engineer jobs in Arizona? The most popular types of Fifo Engineer jobs in Arizona are:
What are popular job titles related to Fifo Engineer jobs in Arizona? For Fifo Engineer jobs in Arizona, the most frequently searched job titles are:
What job categories do people searching Fifo Engineer jobs in Arizona look for? The top searched job categories for Fifo Engineer jobs in Arizona are:
What cities in Arizona are hiring for Fifo Engineer jobs? Cities in Arizona with the most Fifo Engineer job openings:
Infographic showing various Fifo Engineer job openings in Arizona as of July 2026, with employment types broken down into 59% Full Time, and 41% Part Time. Highlights an 100% In-person job distribution, with an average salary of $85,844 per year, or $41.3 per hour.

Advanced ASIC FPGA Design Engineer for Crypto and Cross Domain Solutions

General Dynamics Mission Systems, Inc

Scottsdale, AZ • On-site

$135K - $150K/yr

Full-time

Re-posted 13 days ago


General Dynamics Mission Systems rating

7.9

Company rating: 7.9 out of 10

Based on 30 frontline employees who took The Breakroom Quiz

127th of 241 rated software companies


Job description

Basic Qualifications
Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 5 years of relevant experience; or Master's degree plus a minimum of 3 years of relevant experience.
CLEARANCE REQUIREMENTS: Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.
Responsibilities for this Position
What You'll Do
  • Architect and implement high-performance FPGA designs in VHDL and/or Verilog targeting Xilinx and Microchip device families.
  • Perform synthesis, place-and-route, and timing closure using Vivado or Libero, including advanced techniques such as pipelining, register retiming, floorplanning, and physical optimization
  • Develop and execute block-level simulations using QuestaSim/ModelSim with code coverage analysis (statement, branch, condition, expression)
  • Create self-checking testbenches for correctness verification
  • Design high-speed interfaces for inter-module communication and system integration
  • Collaborate with systems engineers, software developers, and verification engineers in an Agile development environment
  • Participate in design reviews, peer code reviews, and documentation of design specifications and interface control documents
  • Contribute to CI/CD pipeline development for automated synthesis, simulation regression, and coverage tracking
  • Support integration and lab bring-up activities, including on-target FPGA debug using ILAs and JTAG-based tools
Required Qualifications
  • Strong proficiency in VHDL and/or Verilog/SystemVerilog for synthesizable RTL design
  • Hands-on experience with Xilinx Vivado Design Suite or Microchip Libero for synthesis, implementation, and timing analysis
  • Experience targeting Xilinx and Microchip device families
  • Ability to achieve timing closure on designs at 300+ MHz clock rates
  • Experience with FPGA simulation tools (QuestaSim or ModelSim)
  • Proficiency in writing self-checking testbenches with automated pass/fail determination
  • Understanding of high-speed digital design principles: pipelining, clock domain crossing (CDC), metastability mitigation, and synchronous design
  • Experience with AXI-Stream, AXI4, or similar on-chip bus protocols
  • Ability to read and interpret timing reports, utilization summaries, and critical-path analysis output
  • Strong written and verbal communication skills for design documentation and technical presentations
  • S. Citizenship and ability to obtain/maintain a Secret security clearance
Preferred Qualifications
  • Experience with cryptographic algorithm implementation in hardware (AES, GCM, SHA, ECC, RSA, or similar)
  • Experience with high-speed serial interfaces: PCIe, Ethernet (10G/25G/100G), Fibre Channel, Aurora, or GTY/GTM transceivers
  • Experience with CI/CD pipelines for FPGA development (GitLab CI) including automated synthesis and regression testing
  • Proficiency in scripting languages (Tcl, Python, Bash) for build automation and design flow scripting
  • Experience with version control systems (GitLab) and collaborative development workflows
  • Experience with Xilinx IP cores: FIFO Generator, Clock Wizard, MIG/DDR controllers, DMA/Bridge subsystems
  • Experience with embedded processors in FPGA (MicroBlaze, Zynq PS, Versal AI Engine)

#CJ3
Salary Note
This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled.
Combined Salary Range
USD $135,396.00 - USD $150,205.00 /Yr.
Company Overview
General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!
Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans

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