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Executive Brain Computer Interface Jobs in Texas

Manufacturing Operator

Austin, TX · On-site

$17.25 - $20.75/hr

Paradromics is building a brain-computer interface (BCI) platform that records brain activity at the highest possible resolution: the individual neuron. AI algorithms then decode this massive amount ...

Paradromics is building a brain-computer interface (BCI) platform that records brain activity at the highest possible resolution: the individual neuron. AI algorithms then decode this massive amount ...

Paradromics is building a brain-computer interface (BCI) platform that records brain activity at the highest possible resolution: the individual neuron. AI algorithms then decode this massive amount ...

Manufacturing Operator

Austin, TX · On-site

$17.25 - $20.75/hr

Paradromics is building a brain-computer interface (BCI) platform that records brain activity at the highest possible resolution: the individual neuron. AI algorithms then decode this massive amount ...

Mechanical Engineer, Implant

Austin, TX · On-site

$120K - $224K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

As a Mechanical Engineer at Neuralink, you will own the design and production of hardware solutions for our brain-computer interface devices. Projects will be highly varied, leveraging both breadth ...

Mechanical Engineer, Implant

Austin, TX · On-site

$120K - $224K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

As a Mechanical Engineer at Neuralink, you will own the design and production of hardware solutions for our brain-computer interface devices. Projects will be highly varied, leveraging both breadth ...

Hardware/ Software Co-Design Engineer

Austin, TX · On-site

$151 - $261/hr

  • Medical

  • Dental

  • Vision

  • Retirement

... of-the‑art brain-computer interfaces. Relevant product development experience in micro‑architecture design for low‑power processors, on‑chip bus and network interfaces, audio/video ...

Digital IC Design Engineer

Austin, TX · On-site

$116K - $233K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

... brain-computer interfaces. Relevant product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML ...

Hardware/ Software Co-Design Engineer

Austin, TX · On-site

$151K - $261K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

... brain-computer interfaces. Relevant product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML ...

Hardware/ Software Co-Design Engineer

Austin, TX · On-site

$151K - $261K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

... brain-computer interfaces. Relevant product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML ...

Field Clinical Engineer

Austin, TX · On-site

  • Medical

  • Dental

  • Vision

  • Retirement

We work to shape the future of brain-computer interface (BCI) technology through the planning, launch, and execution of groundbreaking human clinical trials. Our team is built on a foundation of ...

Showing results 21-40

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Infographic showing various Executive Brain Computer Interface job openings in Texas as of August 2026, with employment types broken down into 1% As Needed, 82% Full Time, 13% Part Time, 3% Contract, and 1% Nights. Highlights an 80% Physical, 1% Hybrid, and 19% Remote job distribution.

Hardware/ Software Co-Design Engineer

Neuralink

Austin, TX

Full-time

Re-posted 29 days ago


Job description

Team Description: 

The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future. 

Job Description & Responsibilities: 

Our Hardware/ Software Co-Design Engineer will be responsible for delivering micro-architecture and register-transfer level (RTL) implementation of digital IPs and systems with a focus in high-throughput low-power digital signal processor (DSP) and general-purpose hardware accelerators towards realizing state-of-the-art brain-computer interfaces. Relevant product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML accelerators, and communication PHY/MAC will be preferred.

  • Micro-architecture design and RTL implementation of: 
    • Low-power digital signal processors
    • Low-power general-purpose hardware accelerators
    • Low-power graphics processing units
    • Low-power radio MAC/PHY
    • Low-power serial link MAC/PHY
  • Design and optimization of hardware/software interface with firmware engineers
  • Application-specific architecture optimization including:
    • Complex system modeling for energy and performance benchmarks
    • Workload analysis and modeling
    • Energy/performance profiling and analysis
    • Leveraging architecture-level design trade-offs with process technology and workload type
    • Balancing cost and performance under manufacturing process variation 
  • Collaboration on silicon bring-up tests with verification engineers 

Required Qualifications:

  • Bachelor of Science (B.S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent experience
  • Evidence of exceptional ability in electrical engineering, computer science, or computer engineering
  • Experience designing and implementing embedded software in C or Rust
  • Expertise in SystemVerilog, C/C++, Python
  • Experience designing and implementing  emulation models, transactors, and test environments to replicate hardware behavior
  • Experience working on complex digital systems from architecture, microarchitecture, and RTL, using industry standard tools
  • Experience in designing digital signal processing pipelines, from algorithm to RTL

Preferred Qualifications: 

  • Experience in architecture optimization with process technology customization
  • Experience in the verification of complex digital systems, using industry standard tools
  • Experience in the physical design of complex digital systems, using industry standard tools
  • Experience testing and debugging digital system-on-a-chips
  • Functional modeling experience and logic verification with SystemVerilog, SystemC/C++
  • Experience automating tool flows
  • Experience in processor instruction set architecture design
  • Experience in compiler back-end design and customization