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Entry Level Ic Layout Mask Designer Jobs in Seattle, WA

SpaceX

EDA Engineer (RFIC Engineering)

Redmond, WA · On-site

... IC design environment used by silicon design, layout, verification, physical design, and ... The role focuses on keeping EDA tools reliable, PDK and flow usage reproducible, and designers ...

SpaceX

EDA Engineer (RFIC Engineering)

Redmond, WA

... IC design environment used by silicon design, layout, verification, physical design, and ... The role focuses on keeping EDA tools reliable, PDK and flow usage reproducible, and designers ...

SpaceX

EDA Engineer (RFIC Engineering)

Redmond, WA · On-site

... IC design environment used by silicon design, layout, verification, physical design, and ... The role focuses on keeping EDA tools reliable, PDK and flow usage reproducible, and designers ...

Danner Corporation

Paint Prep Technician

Pacific, WA · On-site

$18 - $26/hr

... masking, sanding, and surface preparation/cleaning * Track jobs and complete livery layout ... This is designed to outline primary duties, qualifications and job scope, but does not limit team ...

Danner Corporation

Paint Prep Technician

Pacific, WA · On-site

$18 - $26/hr

... masking, sanding, and surface preparation/cleaning * Track jobs and complete livery layout ... This is designed to outline primary duties, qualifications and job scope, but does not limit team ...

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All JobsIc Layout Mask Designer JobsEntry Level Ic Layout Mask Designer JobsEntry Level Ic Layout Mask Designer Jobs in Seattle, WA

Entry Level Ic Layout Mask Designer information

See Seattle, WA salary details

$170.7K

$199.2K

$224.2K

How much do entry level ic layout mask designer jobs pay per year?

As of Aug 10, 2026, the average yearly pay for entry level ic layout mask designer in Seattle, WA is $199,154.00, according to ZipRecruiter salary data. Most workers in this role earn between $184,900.00 and $213,400.00 per year, depending on experience, location, and employer.

What does an entry level IC layout mask designer do?

An Entry Level IC Layout Mask Designer is responsible for creating the physical layouts of integrated circuits (ICs) based on schematic diagrams and design rules. They use specialized software to design the mask patterns that will be used in semiconductor manufacturing. Their work ensures that the final chip meets functional, performance, and manufacturing requirements. They collaborate closely with circuit designers and verification engineers to optimize layouts and resolve design issues. This role is often a starting point for a career in IC design and fabrication.

What are the key skills and qualifications needed to thrive as an entry level IC layout mask designer?

To thrive as an Entry Level IC Layout Mask Designer, you need a solid understanding of semiconductor physics, circuit design fundamentals, and a relevant degree in electrical engineering or a related field. Familiarity with industry-standard EDA tools such as Cadence Virtuoso or Mentor Graphics, and knowledge of design rules and verification processes, are typically required. Attention to detail, problem-solving abilities, and effective communication are crucial soft skills for collaborating with engineers and ensuring design accuracy. These competencies are essential for producing high-quality, manufacturable integrated circuit layouts that meet stringent specifications and project timelines.

What are some typical challenges faced by entry level IC layout mask designers, and how can they overcome them?

Entry-level IC layout mask designers often encounter challenges such as mastering complex design software, understanding stringent design rules, and collaborating with cross-functional teams. Adjusting to the fast pace of project cycles and ensuring accuracy in layout to meet manufacturing requirements can also be demanding. To overcome these challenges, new designers should seek mentorship from experienced colleagues, actively participate in team meetings to clarify requirements, and practice using industry-standard EDA tools to build confidence and proficiency.

What is the difference between Entry Level Ic Layout Mask Designer vs Entry Level Semiconductor Process Engineer?

AspectEntry Level Ic Layout Mask DesignerEntry Level Semiconductor Process Engineer
CredentialsAssociate's or Bachelor's in Electrical Engineering, MicroelectronicsAssociate's or Bachelor's in Chemical, Materials, or Electrical Engineering
Work EnvironmentDesign labs, cleanrooms, CAD softwareManufacturing facilities, labs, process development
Industry UsageSemiconductor fabrication, chip designSemiconductor manufacturing, process optimization
Common Search/ComparisonDesign-focused, layout, mask creationProcess-focused, fabrication, process steps

The Entry Level Ic Layout Mask Designer primarily focuses on creating detailed mask layouts for semiconductor chips using CAD tools, working closely with design teams. In contrast, the Entry Level Semiconductor Process Engineer concentrates on developing and optimizing manufacturing processes. While both roles require a background in electrical or materials engineering and involve working in semiconductor environments, their core responsibilities differ—design versus process development.

What are the most commonly searched types of Ic Layout Mask Designer jobs in Seattle, WA? The most popular types of Ic Layout Mask Designer jobs in Seattle, WA are:
What cities near Seattle, WA are hiring for Entry Level Ic Layout Mask Designer jobs? Cities near Seattle, WA with the most Entry Level Ic Layout Mask Designer job openings:
Entry Level Ic Layout Mask Designer jobs near you
Infographic showing various Entry Level Ic Layout Mask Designer job openings in Seattle, WA as of August 2026, with employment types broken down into 100% Full Time. Highlights an 100% In-person job distribution, with an average salary of $199,154 per year, or $95.7 per hour.

High-Speed Electro-Optical IC Engineer (RFIC Engineering)

SpaceX

Redmond, WA • On-site

$145K - $200K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted yesterday

SpaceX rating

8.8

Company rating: 8.8 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

15th of 72 rated aerospace companies

Job description

HIGH-SPEED ELECTRO-OPTICAL IC ENGINEER (RFIC ENGINEERING) 

At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe.

We are seeking a motivated, proactive, and intellectually curious Electrical-optical Silicon photonics IC engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering). In this role, you will be developing cutting-edge next-generation PIC/EIC for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has not previously been available, affordable or reliable. Join us to help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.

RESPONSIBILITIES: 

  • Design, simulate and model electro-optical building blocks for a silicon photonics solution
  • Design, simulate and model RF/analog/mixed signal circuits and systems
  • Derive specifications for the Photonics IC/Electrical IC subsystems and circuits
  • Develop Analog/Mixed-Signal/RF/Microwave circuits in SiGe or CMOS processes
  • Work with system architects, DSP and electro-optics, and ASIC engineers to partition functions between hardware and software domains
  • Perform IC floor planning and layout
  • Model package and external parasitic components
  • Evaluate, characterize and measure electrical and optical building blocks of a high-speed optical link solution
  • Assist in the development of automated test lab equipment for lab measurements
  • Work with manufacturing engineers on production testing and qualification of the EIC/PIC components and systems

BASIC QUALIFICATIONS: 

  • Bachelor's degree in electrical engineering, computer engineering, or computer science 
  • 2+ years of photonics or electro-optical integrated circuit design

PREFERRED SKILLS AND EXPERIENCE: 

  • Master's degree or PhD in electrical engineering or computer engineering with an emphasis in electro-optics integrated circuit design
  • Experience using simulation tools such as Spectre, ADS, HFSS or Momentum, Ansys Lumerical, COMSOL
  • Photonics design skills, and experience performing analysis and simulation of optical building blocks such as MZM and Microring modulators, Ge Photo diodes, dWDM filters, waveguides, couplers, dividers and polarization management circuitry
  • Electrical circuit design skills, and experience performing analysis and simulation of both linear and non-linear circuits such as high bandwidth modulator drivers, TIAs, CTLEs, filters, low noise and power amplifiers.
  • Knowledge of advanced packaging technology for optical engine integration in a co-package optics (CPO) solution
  • Experience working on wideband circuit designs supporting high speed Serdes links with more than 100Gbps data rate and BW exceeding 10s of GHz
  • Familiarity with high speed SerDes architecture, modulation schemes such as NRZ and PAM4 and link protocols
  • Familiarity with optical and radio related test equipment such as spectrum analyzers, vector signal analyzers, vector signal generators, high speed oscilloscopes and BERTs
  • Experience characterizing EIC/PIC performance for high speed optical Serdes

ADDITIONAL REQUIREMENTS: 

  • Ability to work long hours and weekends as necessary to support critical milestones 
COMPENSATION AND BENEFITS:
Pay Range:
Level 1: $125,000.00 - $165,000.00
Level 2: $145,000.00 - $200,000.00

Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short and long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation and will be eligible for 10 or more paid holidays per year. Employees in Washington State accrue paid sick time in compliance with state and federal law. Company shuttles are offered to employees for roundtrip travel from select Seattle locations to the SpaceX Redmond office Monday to Friday.

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About SpaceX

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Industry

Aerospace product and parts manufacturing, data services, guided missile and space vehicle manufacturing and satellite telecommunications

Company size

1,001 - 5,000 Employees

Headquarters location

Hawthorne, CA, US

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