2

Entry Level Design Verification Engineer Jobs in Brooklyn, NY

To further strengthen our team, we are looking for an expert digital verification engineer who will be involved in the verification of these products, working within a team of digital design ...

To further strengthen our team, we are looking for an expert digital verification engineer who will be involved in the verification of these products, working within a team of digital design ...

Design Engineer(s)

Edison, NJ · On-site

$100.90K/yr

The two years of engineering experience must include one year of experience using Unigraphics (NX), Teamcenter (PLM), Design Verification Plan and Report (DVP&R), Design Failure Mode and Effects ...

... design verification, qualification, and acceptance • Self-starter must have the ability to ... Recent grads or entry level will be considered Medical benefits and 401K available (see employee ...

New

Entry Level Traffic Engineer

Bloomfield, NJ · On-site

$79.80K - $82.30K/yr

Design Traffic Signals and signal timings per agency standards * Prepare Traffic Signal plans ... verification, educational and other credential verification, driving record check, criminal ...

Entry Level Traffic Engineer

Bloomfield, NJ · On-site

$79.80K - $82.30K/yr

Design Traffic Signals and signal timings per agency standards * Prepare Traffic Signal plans ... verification, educational and other credential verification, driving record check, criminal ...

Entry Level Highway Engineer

Bloomfield, NJ · On-site

$79.80K - $82.30K/yr

Responsibilities include design and preparation of contract documents for roadway improvement ... verification, educational and other credential verification, driving record check, criminal ...

Responsibilities include design and preparation of contract documents for roadway improvement ... verification, educational and other credential verification, driving record check, criminal ...

... entry-level design team assistant, working under the direct supervision of the Project Manager to provide valuable design support to the project team. This includes performing basic engineering ...

About the Role The Engineering Department at AKRF is seeking an Entry Level Civil Engineer to work ... This individual will serve a key function in helping to design commercial, residential, -use, and ...

Entry Level Civil Engineer

Manhattan, NY · On-site

$81.10K - $83.60K/yr

Dewberry is currently seeking an Entry Level Civil Engineer to join our Civil Group in our New York ... Prior relevant internship or professional experience in site/civil design, including site planning ...

Entry Level Civil Engineer

Manhattan, NY · On-site

$81.10K - $83.60K/yr

Dewberry is currently seeking an Entry Level Civil Engineer to join our Civil Group in our New York ... Prior relevant internship or professional experience in site/civil design, including site planning ...

next page

Showing results 1-20

Entry Level Design Verification Engineer information

See Brooklyn, NY salary details

$110.9K

$156.8K

$175.6K

How much do entry level design verification engineer jobs pay per year?

As of May 28, 2026, the average yearly pay for entry level design verification engineer in Brooklyn, NY is $156,832.00, according to ZipRecruiter salary data. Most workers in this role earn between $143,000.00 and $174,500.00 per year, depending on experience, location, and employer.

What is an Entry Level Design Verification Engineer job?

An Entry Level Design Verification Engineer ensures that hardware designs function correctly before production. They write and run testbenches using languages like SystemVerilog and work with simulation tools to verify chip functionality. Their role involves debugging, analyzing test results, and collaborating with designers to refine designs. This position is crucial in the semiconductor industry to prevent costly design errors. Typically, they work with verification methodologies like UVM to create efficient and reusable test environments.

What are the key skills and qualifications needed to thrive in the Entry Level Design Verification Engineer position, and why are they important?

To thrive as an Entry Level Design Verification Engineer, you need a solid understanding of digital logic design, computer architecture, and verification methodologies, typically supported by a degree in electrical engineering, computer engineering, or a related field. Familiarity with hardware description languages (such as Verilog or VHDL), simulation tools, and industry-standard verification frameworks is essential. Strong analytical skills, attention to detail, and effective communication are vital soft skills for diagnosing issues and collaborating with design teams. These skills ensure accurate verification of hardware designs and smooth integration within the broader engineering workflow.

What are typical tasks and responsibilities for an Entry Level Design Verification Engineer on a daily basis?

As an Entry Level Design Verification Engineer, your daily activities often include writing and executing testbenches, analyzing simulation results, identifying design bugs, and collaborating closely with design and development engineers to resolve issues. You may also be responsible for maintaining verification documentation and participating in code reviews or team meetings. The role involves a mix of hands-on technical work and teamwork, allowing you to learn best practices from experienced colleagues. Over time, you'll have opportunities to take on more complex verification tasks and contribute to process improvements as you gain experience.
What are popular job titles related to Entry Level Design Verification Engineer jobs in Brooklyn, NY? For Entry Level Design Verification Engineer jobs in Brooklyn, NY, the most frequently searched job titles are:
What job categories do people searching Entry Level Design Verification Engineer jobs in Brooklyn, NY look for? The top searched job categories for Entry Level Design Verification Engineer jobs in Brooklyn, NY are:
What cities near Brooklyn, NY are hiring for Entry Level Design Verification Engineer jobs? Cities near Brooklyn, NY with the most Entry Level Design Verification Engineer job openings:
Infographic showing various Entry Level Design Verification Engineer job openings in Brooklyn, NY as of May 2026, with employment types broken down into 95% Full Time, 4% Part Time, and 1% Contract. Highlights an 52% Physical, 9% Hybrid, and 39% Remote job distribution, with an average salary of $156,832 per year, or $75.4 per hour.

ASIC Design verification Engineer

Capgemini Engineering

Manhattan, NY • On-site, Remote

$76.20K - $187.74K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

This job post has expired today. Applications are no longer accepted.


Job description

At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world's most innovative companies unleash their potential. From autonomous cars to life‐saving robots, our digital and software technology experts think outside the box as they provide unique R&D and engineering services across all industries. Join us for a career full of opportunities.

Where you can make a difference. Where no two days are the same. Role : ASIC verification Engineer The role is 100% remote role About the role We are seeking an ASIC Verification Engineer with hands‐on experience working on ARM‐related IPs such as CPU (Cortex‐A v9 architecture), GPU (Mali), Debug (CSS600, CoreSight), etc.

Your Responsibilities Assure the overall quality of our designs, contributing to exciting launches of wireless portable hardware at Snap. Maintain a strong focus on ARM IPs (CPU — Cortex‐A v9 architecture, GPU — Mali, Debug — CSS600, CoreSight, etc.), where your expertise will enable architectural/design reviews and rapid ramp‐up on verification of these blocks. Serve as an individual contributor, owning and developing the verification of our core IP blocks.

Take ownership throughout the entire project lifecycle, including: specification reviews, verification plans, test case development, UVM environments, coverage (analysis), debugging, GLS, etc. Work closely with other teams to gather relevant information and share design insights to improve requirements and specifications, while also providing critical support in their debugging efforts. Collaborate with the global verification team to enhance processes and lead initiatives that improve design quality and strengthen verification methodologies to build a best‐in‐class verification team Your Profile Hands‐on experience designing and implementing C‐based test cases to configure and test ARM IPs, along with the ability to reuse manufacturer‐provided test benches.

Nice to Have Experience using and creating a UVM‐based test environment for block‐level verification, and reusing those environments at subsystem level. Ability to read and understand RTL code (SystemVerilog, Verilog, VHDL). Experience with revision control systems and CI/CD techniques.

Strong interpersonal skills with the ability to collaborate across teams and work independently. Excellent process development, documentation, and written and verbal communication skills. The base compensation range for this role in the posted location is $76,200 to $187,740 / year.

Capgemini provides compensation range information in accordance with applicable national, state, provincial, and local pay transparency laws. The base compensation range listed for this position reflects the minimum and maximum target compensation Capgemini, in good faith, believes it may pay for the role at the time of this posting. This range may be subject to change as permitted by law.

The actual compensation offered to any candidate may fall outside of the posted range and will be determined based on multiple factors legally permitted in the applicable jurisdiction. These may include, but are not limited to: Geographic location, Education and qualifications, Certifications and licenses, Relevant experience and skills, Seniority and performance, Market and business consideration, Internal pay equity. It is not typical for candidates to be hired at or near the top of the posted compensation range.

In addition to base salary, this role may be eligible for additional compensation such as variable incentives, bonuses, or commissions, depending on the position and applicable laws. Capgemini offers a comprehensive, non-negotiable benefits package to all regular, full‐time employees. In the U.S.

and Canada, available benefits are determined by local policy and eligibility and may include: Paid time off based on employee grade (A‐F), defined by policy: Vacation: 12‐25 days, depending on grade, Company paid holidays, Personal Days, Sick Leave Medical, dental, and vision coverage (or provincial healthcare coordination in Canada) Retirement savings plans (e.g., 401(k) in the U.S., RRSP in Canada) Life and disability insurance Employee assistance programs Other benefits as provided by local policy and eligibility Important Notice: Compensation (including bonuses, commissions, or other forms of incentive pay) is not considered earned, vested, or payable until it becomes due under the terms of applicable plans or agreements and is subject to Capgemini's discretion, consistent with applicable laws. The Company reserves the right to amend or withdraw compensation programs at any time, within the limits of applicable legislation. Disclaimers Capgemini is an Equal Opportunity Employer encouraging inclusion in the workplace.

Capgemini also participates in the Partnership Accreditation in Indigenous Relations (PAIR) program which supports meaningful engagement with Indigenous communities across Canada by promoting fairness, accessibility, inclusion and respect. We value the rich cultural heritage and contributions of Indigenous Peoples and actively work to create a welcoming and respectful environment. All qualified applicants will receive consideration for employment without regard to race, national origin, gender identity/expression, age, religion, disability, sexual orientation, genetics, veteran status, marital status or any other characteristic protected by law.

This is a general description of the Duties, Responsibilities and Qualifications required for this position. Physical, mental, sensory or environmental demands may be referenced in an attempt to communicate the manner in which this position traditionally is performed. Whenever necessary to provide individuals with disabilities an equal employment opportunity, Capgemini will consider reasonable accommodations that might involve varying job requirements and/or changing the way this job is performed, provided that such accommodation does not pose an undue hardship.

Capgemini is committed to providing reasonable accommodation during our recruitment process. If you need assistance or accommodation, please reach out to your recruiting contact. Please be aware that Capgemini may capture your image (video or screenshot) during the interview process and that image may be used for verification, including during the hiring and onboarding process.

Click the following link for more information on your rights as an Applicant in the United States. http://www.capgemini.com/resources/equal-employment-opportunity-is-the-law Capgemini is a global business and technology transformation partner, helping organizations to accelerate their dual transition to a digital and sustainable world, while creating tangible impact for enterprises and society. It is a responsible and diverse group of 340,000 team members in more than 50 countries.

With its strong over 55-year heritage, Capgemini is trusted by its clients to unlock the value of technology to address the entire breadth of their business needs. It delivers end‐to‐end services and solutions leveraging strengths from strategy and design to engineering, all fueled by its market leading capabilities in AI, generative AI, cloud and data, combined with its deep industry expertise and partner ecosystem. #J-18808-Ljbffr