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Emc Test Engineer Manager Jobs (NOW HIRING)

Test Engineer - EMI/EMC

Plainview, NY · On-site

$85K - $95K/yr

Provide regular testing status updates to Engineering Managers and Program Managers. * Coordinate ... Familiarity with automated EMC test software suites (e.g., TILE, EMC32, or LabWindows/CVI) is ...

The EMC Test Engineer is responsible for assisting the EMC Lab Manger and supporting all activities in the EMC laboratory. These include, but are not limited, to following/supporting quality ...

Test Engineer - EMI/EMC

Plainview, NY · On-site

$85K - $95K/yr

Provide regular testing status updates to Engineering Managers and Program Managers. * Coordinate ... Familiarity with automated EMC test software suites (e.g., TILE, EMC32, or LabWindows/CVI) is ...

Test Engineer - EMI/EMC

Plainview, NY · On-site

$85K - $95K/yr

Provide regular testing status updates to Engineering Managers and Program Managers. * Coordinate ... Familiarity with automated EMC test software suites (e.g., TILE, EMC32, or LabWindows/CVI) is ...

The EMC Test Engineer is responsible for assisting the EMC Lab Manger and supporting all activities in the EMC laboratory. These include, but are not limited, to following/supporting quality ...

Senior EMC / EMI Test Engineer, San Francisco, CA Join a team developing next-generation AI-driven hardware technologies. We're seeking a hands-on EMC/EMI Test Engineer to support validation, pre ...

The Hardware Engineering Organization is looking for an EMI/EMC Test Engineer to deliver value and innovation as Anduril's products across all domains - air, land, water, and space - are introduced ...

The Role In collaboration with Electrical Engineers, you will spearhead the EMC test campaigns for ... Project management; cross-dsciplinary application Nice to Have * Experience with MIL-STD-461 and ...

Senior EMC Test Engineer

Santa Clara, CA · On-site

$45.67 - $60.10/hr

Generate valid and accurate EMC test results in accordance with CISPR, FCC, ISO, ETSI and IEC/EN ... Other duties as deemed appropriate by management and for which management believes adequate ...

EMI/EMC Test Engineer

Costa Mesa, CA · On-site

$129K - $161K/yr

The Hardware Engineering Organization is looking for an EMI/EMC Test Engineer to deliver value and innovation as Anduril's products across all domains - air, land, water, and space - are introduced ...

Showing results 21-40

Emc Test Engineer Manager information

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How much do emc test engineer manager jobs pay per hour?

As of Sep 10, 2026, the average hourly pay for emc test engineer manager in the United States is $63.51, according to ZipRecruiter salary data. Most workers in this role earn between $46.39 and $67.07 per hour, depending on experience, location, and employer.

What are popular job titles related to Emc Test Engineer Manager jobs?

For Emc Test Engineer Manager jobs, the most frequently searched job titles are:

EMC Test Engineer, Platforms Infrastructure Engineering

Sunnyvale, CA • On-site

Google Inc.
Software Development • 10K+ employees

Other

Posted 13 days ago


Google rating

8.8

Company rating: 8.8 out of 10

Based on 103 frontline employees who took The Breakroom Quiz

48th of 247 rated software companies


Job description

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corporate_fare Google place Sunnyvale, CA, USAMidExperience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.
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  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, or a specialized field (e.g., Optics, Sensors, Audio/DSP, etc.), or equivalent practical experience.
  • 2 years of experience working in a hardware testing environment.
  • 2 years of experience in hardware compliance, EMC/EMI testing, or hardware validation.
  • Experience developing and executing comprehensive EMC/EMI test plans (including radiated/conducted emissions, immunity, and ESD).
  • Experience with hardware bring-up and troubleshooting, including performing root-cause analysis on compliance failures and recommend practical design mitigations (e.g., shielding, grounding, and PCB layout processing).
Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering, Computer Engineering, Physics, or a related field (Optics, Sensors, Audio/DSP).
  • 4 years of experience conducting standard immunity/emissions compliance tests (ESD, Surge, Radiated/Conducted) and root‑cause failure analysis with practical shielding, filtering, and PCB layout mitigations.
  • Experience operating of spectrum analyzers, receivers, generators, and amplifiers, backed by deep familiarity with global regulatory frameworks.
  • Knowledge of global EMC/RF regulatory standards and compliance frameworks (FCC, CE, CISPR, IEC/EN, and KN/KS).
  • Ability to lead technical projects, authored Standard Operating Procedures (SOPs), and executed hardware platform bring‑up utilizing various software tools.
About the job

As a part of an EMC Test Engineer at Google, you will be responsible for ensuring that complex hardware systems comply with global Electromagnetic Compatibility (EMC) and Radio Frequency (RF) standards. You will own the entire hardware development life-cycle, from early engineering verification, formal certification and sustaining.
You will act as a critical technical gatekeeper and diagnostic expert, as it will unblock hardware release schedules by preparing Equipment Under Test (EUT), executing test plans, launching specialized offline workloads, and performing deep root-cause failure analysis to recommend design mitigations (such as layout, grounding, or shielding changes).
In this role, through process automation, meticulous component qualification, and deep cross‑functional collaboration with hardware design, firmware, and external lab teams, the EMC Test Engineer ensures Google’s hardware platforms satisfy both internal engineering specifications and worldwide regulatory mandates efficiently.

Our Platforms Infrastructure Engineering team designs and builds theAbout the job

As a part of an EMC Test Engineer at Google, you will be responsible for ensuring that complex hardware systems comply with global Electromagnetic Compatibility (EMC) and Radio Frequency (RF) standards. You will own the entire hardware development life-cycle, from early engineering verification, formal certification and sustaining.
You will act as a critical technical gatekeeper and diagnostic expert, as it will unblock hardware release schedules by preparing Equipment Under Test (EUT), executing test plans, launching specialized offline workloads, and performing deep root‑cause failure analysis to recommend design mitigations (such as layout, grounding, or shielding changes).
In this role, through process automation, meticulous component qualification, and deep cross‑functional collaboration with hardware design, firmware, and external lab teams, the EMC Test Engineer ensures Google’s hardware platforms satisfy internal engineering specifications and worldwide regulatory mandates efficiently.

Our Platforms Infrastructure Engineering team designs and builds the
hardware and software technologies that power all of Google's services. Our computational challenges are complex and unique, enabled by cutting‑edge custom hardware designed and made in-house. As a hardware engineer, you will design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You will see those systems from concept all the way through to high‑volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting‑edge data centers, affecting millions of Google users.Individual pay is determined by factors including job‑related skills, experience, and relevant education or training.
US: $132000 - $189000 (USD) + 15% bonus target + equity + benefits
Learn more about benefits at Google .
  • Develop and execute full test plans (radiated/conducted emissions, immunity, ElectroStatic Discharge (ESD) for NPI hardware in internal and external labs.
  • Lead offline bring‑up for EUTs, coordinating with firmware and lab teams to deploy custom workloads for off‑network validation.
  • Perform root‑cause analysis on compliance failures and provide actionable design recommendations (shielding, layout, grounding).
  • Drive EMC/ESD qualification for sensitive high‑speed components (e.g., optical modules) to act as a critical release gate.
  • Serve as a technical Subject Matter Expert (SME) to ensure "compliance‑by‑design" while expanding lab capabilities and authoring Standard Operating Procedure (SOPs).

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents‑to‑be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.

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