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Director Signal Integrity Engineer Jobs in Oregon

Teradyne

Senior Calibration Engineer

Tualatin, OR · On-site

$161K - $284K/yr

Mentor engineers and provide technical leadership on critical projects. * Drive software quality ... Knowledge of Signal Integrity concepts including eye diagrams and TDR analysis. * Experience with ...

A-dec, Inc.

Electrical Engineer, Principal

Newberg, OR

$146K - $178K/yr

Thorough knowledge of designing for signal integrity of Analog Circuits. * Working knowledge of ... Ability to provide engineering solutions to a variety of problems. Skilled to apply and fully use ...

A-dec, Inc.

Electrical Engineer, Principal

Newberg, OR · On-site

$146K - $178K/yr

Thorough knowledge of designing for signal integrity of Analog Circuits. * Working knowledge of ... Ability to provide engineering solutions to a variety of problems. Skilled to apply and fully use ...

Nvidia

Senior Mask Design Engineer - Hardware

OR · On-site +1

You'll collaborate cross functionally with package technical lead (PTL) and I/O signal integrity and technology engineers to deliver solution for product packages in tight schedule. * Performing ...

Intel

Silicon Packaging Design Engineer

Hillsboro, OR

$148K/yr

Intel seeks a motivated and innovative Silicon Packaging Design Engineer to join our team, driving ... for signal integrity assessments and I/O fundamentals. * 1+ year of experience of Power ...

Ralliant

Principal Product Manager

Beaverton, OR · On-site

As a recognized expert in high-speed interfaces and signal integrity, you will work closely with engineering, sales, marketing, and executive leadership to identify market opportunities, guide ...

New

FormFactor, Inc.

Sr Principal RF Engineer

Beaverton, OR · On-site

$115K - $151K/yr

We are seeking a Sr. Principal RF Engineer with deep expertise in RF, high-speed digital, and ... Background in PCB design and understanding of fabrication constraints and signal-integrity ...

Nvidia

Senior Package Layout Engineer - Hardware

OR · On-site +1

To this purpose, we are now seeking a hard-working Senior Package Layout Engineer who is committed ... Solid understanding of high-speed design signal integrity practices * Experience with Virtuoso and ...

Intel

High speed PHY System Architect

Hillsboro, OR · On-site

$164K - $311K/yr

Familiarity with signal integrity and power integrity analysis. * Background in analog layout ... The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable ...

FormFactor, Inc.

Sr Manager, RF Design

Beaverton, OR · On-site

$139 - $182/hr

The role works closely with Product and Applications Engineering, Signal Integrity and RF ... Technical Leadership Direct the production design of RF and microwave probe card solutions Provide ...

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Director Signal Integrity Engineer information

What does a director signal integrity engineer do?

A Director Signal Integrity Engineer leads teams responsible for ensuring the reliable and high-speed transmission of signals in electronic systems. They oversee the design, analysis, and testing of signal integrity for hardware components such as PCBs, connectors, and cables. Their work involves mitigating issues like noise, crosstalk, and electromagnetic interference to maintain signal quality. In addition to technical oversight, they often collaborate with cross-functional teams, set engineering standards, and guide the strategic direction of signal integrity initiatives.

What are some typical challenges faced by a director signal integrity engineer when leading cross-functional teams?

A Director Signal Integrity Engineer often encounters challenges in aligning cross-functional teams, such as hardware, PCB design, and validation groups, to ensure signal integrity requirements are met throughout the product lifecycle. Balancing technical depth with effective communication is crucial, as team members may have varying levels of expertise. Additionally, managing tight project timelines while troubleshooting complex signal issues and ensuring all teams adhere to industry standards can be demanding. Strong leadership and collaboration skills are essential to facilitate smooth coordination and drive successful project outcomes.

What is the difference between Director Signal Integrity Engineer vs Signal Integrity Engineer?

AspectDirector Signal Integrity EngineerSignal Integrity Engineer
CredentialsBachelor's/Master's in Electrical Engineering, often with leadership experienceBachelor's/Master's in Electrical Engineering or related field
Work EnvironmentLeadership role overseeing teams and projectsTechnical role focused on design and analysis
Industry UsageUsed in large tech, semiconductor, and electronics companiesCommon across similar industries for technical roles
ResponsibilitiesStrategic planning, team management, high-level design oversightSignal integrity analysis, testing, and troubleshooting

The main difference is that the Director Signal Integrity Engineer holds a leadership position with strategic responsibilities, while the Signal Integrity Engineer focuses on technical analysis and design. Both roles require similar technical credentials but differ in scope and level of responsibility.

What are the most commonly searched types of Signal Integrity Engineer jobs in Oregon?

The most popular types of Signal Integrity Engineer jobs in Oregon are:

What are popular job titles related to Director Signal Integrity Engineer jobs in Oregon?

For Director Signal Integrity Engineer jobs in Oregon, the most frequently searched job titles are:

What job categories do people searching Director Signal Integrity Engineer jobs in Oregon look for?

The top searched job categories for Director Signal Integrity Engineer jobs in Oregon are:

What cities in Oregon are hiring for Director Signal Integrity Engineer jobs?

Cities in Oregon with the most Director Signal Integrity Engineer job openings:

Director Signal Integrity Engineer jobs near you

Principal Analog Circuit Design Engineer - SerDes

Intel

Hillsboro, OR • On-site

$220K/yr

Full-time

Medical, Retirement, PTO

Re-posted 23 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

19th of 159 rated electronics manufacturers

Job description

Job Details:Job Description: 

We are seeking a highly experienced and motivated Principal Analog Design Engineer to lead the design and validation of cutting-edge analog circuits for high-speed (112G and 224G) SerDes applications. In this role, you will be a key technical driver in the definition, execution, and validation of complex analog and mixed-signal designs.

This role involves providing technical direction and mentorship to layout and less experienced analog design engineers, fostering a collaborative and knowledge-sharing culture. You will engage closely with cross-functional teams, including systems, digital design, and test engineering, to ensure robust design implementation and validation.Strong problem-solving skills, analytical thinking, and a commitment to execution excellence are essential. As a principal-level engineer, you will be expected to demonstrate a proven track record of delivering high-quality results in advanced FinFET CMOS technology within high-speed SerDes design environments. Excellent documentation and presentation skills are also required to clearly communicate complex design concepts and results.

The ideal candidate is self-driven, detail-oriented, and thrives in a fast-paced environment. You will actively participate in technical discussions across multiple disciplines, including analog/mixed-signal design, post-silicon validation, and system-level collaboration.

Desired traits:

Excellent communication, documentation, and presentation skills.

Strong problem-solving attitude and ability to deliver under tight schedules in a collaborative environment.

Demonstrated leadership in cross-functional technical discussions and decision-making.

Team player with a collaborative mindset, willingness to share knowledge, and a hands-on approach to problem-solving

Qualifications:

Minimum Qualifications

Master's degree in Electrical Engineering, Electronics Engineering, or related field.

8+ years of experience in analog/mixed-signal circuit design for high-speed SerDes applications. Proven expertise in one or more of the following areas: PLL, CDR, CTLE, DFE, ADC, or Transmitter (TX) design.

Strong understanding of high-speed communication standards such as PCIe (Gen5/Gen6) and Ethernet (100G/400G/800G).

Solid foundational knowledge of analog design principles-noise, jitter, matching, stability, and linearity.

Hands-on experience with advanced FinFET CMOS process technologies (7nm or below).

Proficiency in analog design and simulation tools such as Cadence Virtuoso/ADE, HSPICE, or equivalent.

Experience in silicon bring-up, post-silicon validation, and lab debug of analog circuits.

Preferred Qualifications

Ph.D. in Electrical Engineering, Electronics Engineering, or related field.

10+ years of experience in analog design for high-speed SerDes (56G/112G/224G) applications.

Deep expertise in transmitter and receiver architecture, CDR loops, equalization techniques, and advanced ADC architectures.

Familiarity with next-generation standards such as PCIe 6.0+, 800G/1.6T Ethernet, JESD, and other SerDes protocols.

Hands-on experience in behavioral modeling (Verilog-A), MATLAB-based analysis, and automation scripting (Python/Tcl/Perl).

Strong understanding of signal integrity, channel modeling, and system-level link performance.

Proven ability to mentor junior engineers, guide layout implementation, and drive design reviews..

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, Santa ClaraAdditional Locations:US, Arizona, Phoenix, US, Oregon, HillsboroBusiness group:The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $220,920.00-311,890.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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