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Director Compiler Engineer Jobs in Washington (NOW HIRING)

Director Compiler Engineer information

What does a Director Compiler Engineer do?

A Director Compiler Engineer leads teams responsible for designing, developing, and optimizing compiler technologies that translate high-level programming languages into machine code. They oversee the overall strategy, architecture, and performance of compiler products, ensuring they meet the needs of software developers and hardware platforms. In addition to managing projects and technical direction, they often collaborate with other engineering teams, mentor staff, and keep up with advances in programming languages and processor architectures.

What is the difference between Director Compiler Engineer vs Compiler Engineer?

AspectDirector Compiler EngineerCompiler Engineer
ResponsibilitiesOversees compiler development teams, sets strategic goals, manages project timelinesDesigns, develops, and tests compiler components and features
Required CredentialsBachelor's or Master's in Computer Science, extensive experience in compiler development, leadership skillsBachelor's or Master's in Computer Science, strong programming skills, experience with compiler tools
Work EnvironmentLeadership roles in tech companies, collaborative team settingsDevelopment teams, coding environments, research labs
Industry UsageCommon in large tech firms, software companies, and organizations with complex compiler needsUsed across software development, embedded systems, and research projects

The main difference is that a Director Compiler Engineer focuses on leadership, strategy, and team management, while a Compiler Engineer concentrates on technical development and coding tasks. Both roles require strong technical skills, but the director role involves overseeing projects and guiding teams.

What are some common challenges faced by a Director Compiler Engineer, and how can they be addressed?

A Director Compiler Engineer often encounters challenges such as leading teams through complex technical problems, balancing project timelines with innovation, and ensuring cross-functional collaboration between hardware and software teams. Addressing these requires strong leadership, clear communication, and strategic planning to allocate resources efficiently. Additionally, staying up-to-date with evolving programming languages and hardware architectures is essential to guide the team and maintain competitive compiler performance.

What are the key skills and qualifications needed to thrive as a Director Compiler Engineer, and why are they important?

To thrive as a Director Compiler Engineer, you need deep expertise in compiler theory, programming languages, and computer architecture, often supported by an advanced degree in computer science or a related field. Proficiency with compiler toolchains (like LLVM or GCC), performance analysis tools, and version control systems is typically required, along with familiarity with modern programming languages such as C++ or Rust. Strong leadership, strategic thinking, and excellent communication skills are essential for guiding teams and collaborating with stakeholders. These skills ensure the development of robust, high-performance compiler solutions that align with organizational goals and technology strategies.
What job categories do people searching Director Compiler Engineer jobs in Washington look for? The top searched job categories for Director Compiler Engineer jobs in Washington are:
What cities in Washington are hiring for Director Compiler Engineer jobs? Cities in Washington with the most Director Compiler Engineer job openings:
Infographic showing various Director Compiler Engineer job openings in Washington as of June 2026, with employment types broken down into 2% As Needed, 80% Full Time, 16% Part Time, and 2% Contract. Highlights an 93% Physical, 3% Hybrid, and 4% Remote job distribution.

AI Infrastructure Engineer

Bright Vision Technologies

Herndon, VA • Remote

$100K - $150K/yr

Full-time

This job post has expired today. Applications are no longer accepted.


Job description

AI Infrastructure Engineer- Remote
Bright Vision Technologies is a technology consulting and software development company delivering cloud, AI, data, and enterprise solutions across the United States. 
 
This is a fantastic opportunity to join an established and well-respected organization offering tremendous career growth potential. 
Job Title: AI Infrastructure Engineer
Location: 100% Remote (United States)
Position Type: Full-time, Direct W2
Salary Range: $100,000–$150,000 Annually
Experience: 6+ years
Sponsorship: U.S. Citizens, Green Card Holders, EAD Holders, and H-1B transfer candidates are encouraged to apply. We are unable to sponsor new H-1B visa petitions for this position. 
Job Summary
We are seeking an AI Performance Optimization Engineer to focus on extracting maximum throughput, minimizing latency, and reducing cost across training and inference workloads for large neural network systems. The role spans the full stack from low-level kernel optimization to distributed system tuning, requiring deep understanding of GPU architecture, model parallelism, memory management, and compiler-level optimization. The ideal candidate has demonstrated an impact on production of AI workloads, with strong instrumentation and measurement discipline that enables rigorous, data-driven optimization decisions. In this role you will work closely with cross-functional partners — product, design, engineering, operations, and business stakeholders — to translate ambiguous requirements into well-engineered solutions, and will be expected to raise the bar through code review, design review, and mentorship of more junior engineers. The successful candidate brings strong engineering discipline, a clear communication style, and a track record of shipping meaningful work that holds up well in production.
Key Responsibilities
  • Profile and optimize end-to-end AI training and inference pipelines for throughput, latency, and cost.
  • Identify and eliminate bottlenecks across data loading, model compute, communication, and memory.
  • Implement and tune quantization, sparsity, and pruning strategies to reduce model footprint and accelerate inference.
  • Optimize distributed training using tensor parallelism, pipeline parallelism, FSDP, and ZeRO-style sharding.
  • Tune attention implementations using Flash Attention, paged attention, and related techniques.
  • Implement KV cache optimization, continuous batching, and speculative decoding for LLM serving.
  • Drive compiler-level optimizations using Triton, XLA, Torch Inductor, or TVM, working with the broader ML framework community to land improvements that translate into measurable end-to-end performance gains.
  • Optimize data pipelines, sharding strategies, and storage access patterns for high-throughput training.
  • Build and maintain rigorous benchmark suites and regression frameworks across workloads.
  • Collaborate with ML and platform engineering teams to embed best practices in standard pipelines.
  • Drive cost-efficiency improvements through model architecture, hardware selection, and scheduling strategies.
  • Evaluate new hardware and software offerings and advise on adoption.
  • Document performance tuning playbooks and share findings broadly across engineering teams.
  • Stay current with AI systems to research and translate advances into production improvements.
Required Qualifications
  • Bachelor\'s or master\'s degree in computer science, Computer Engineering, or related field.
  • Six or more years of experience in performance engineering, ML systems, or HPC.
  • Strong proficiency in Python and C++.
  • Hands-on experience optimizing deep learning workloads on modern GPUs.
  • Deep understanding of distributed training and inference techniques.
  • Experience with profiling tools across CPU, GPU, and distributed systems.
  • Familiarity with model compression techniques and their accuracy implications.
  • Strong grasp of memory hierarchies, communication primitives, and parallelism strategies.
  • Excellent measurement, debugging, and analytical reasoning skills.
  • Strong communication and collaboration skills.
Preferred Qualifications
  • Experience optimizing LLM inference at production scale.
  • Contributions to vLLM, TensorRT-LLM, DeepSpeed, or similar projects.
  • Familiarity with custom kernel authoring in Triton or CUTLASS.
  • Experience with FinOps for AI workloads.
  • Publications or talks on AI systems performance.
How to Apply
Would you like to know more about this opportunity? For immediate consideration, please send your resume to boon@bvteck.com or contact us at (908) 650-6699. Learn more about Bright Vision Technologies at www.bvteck.com. 
 
Bright Vision Technologies is an Equal Opportunity Employer. 
 

Equal Employment Opportunity (EEO) Statement

Bright Vision Technologies (BV Teck) is committed to equal employment opportunity (EEO) for all employees and applicants without regard to race, color, religion, sex, sexual orientation, gender identity or expression, national origin, age, genetic information, disability, veteran status, or any other protected status as defined by applicable federal, state, or local laws. This commitment extends to all aspects of employment, including recruitment, hiring, training, compensation, promotion, transfer, leaves of absence, termination, layoffs, and recall.

BV Teck expressly prohibits any form of workplace harassment or discrimination. Any improper interference with employees\' ability to perform their job duties may result in disciplinary action up to and including termination of employment.