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Director Compiler Engineer Jobs in Texas (NOW HIRING)

Strong understanding and direct experience with ML frameworks (PyTorch, JAX) and graph/ML compiler technologies (e.g. OpenXLA). * Experience with C++ and Python programming languages. * Strong ...

Senior VLSI CAD Engineer

Austin, TX · Hybrid

$106K - $138K/yr

Unlike typical CAD roles, this position offers direct impact on a dynamic chip roadmap-your ... Bring up compiler workspaces for new projects and ensure all internal flows, infrastructure, and ...

GPU PD Engineer (Austin/San Diego)

Austin, TX · On-site

$81K - $109K/yr

Experience with physical synthesis and implementation tools - Synopsys Fusion Compiler, ICC2 and ... Master's degree in Electrical/Computer Engineering * 15+ years of direct synthesis and physical ...

Systems Design Engineer - AI Cluster Software

Austin, TX · On-site

$171K - $203K/yr

... directed, proactive, and comfortable navigating ambiguity to solve complex problems. • Clear ... ROCm, RCCL, Instinct GPUs, EPYC platforms, compiler/toolchain impacts, and performance tuning. • ...

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Director Compiler Engineer information

What does a Director Compiler Engineer do?

A Director Compiler Engineer leads teams responsible for designing, developing, and optimizing compiler technologies that translate high-level programming languages into machine code. They oversee the overall strategy, architecture, and performance of compiler products, ensuring they meet the needs of software developers and hardware platforms. In addition to managing projects and technical direction, they often collaborate with other engineering teams, mentor staff, and keep up with advances in programming languages and processor architectures.

What is the difference between Director Compiler Engineer vs Compiler Engineer?

AspectDirector Compiler EngineerCompiler Engineer
ResponsibilitiesOversees compiler development teams, sets strategic goals, manages project timelinesDesigns, develops, and tests compiler components and features
Required CredentialsBachelor's or Master's in Computer Science, extensive experience in compiler development, leadership skillsBachelor's or Master's in Computer Science, strong programming skills, experience with compiler tools
Work EnvironmentLeadership roles in tech companies, collaborative team settingsDevelopment teams, coding environments, research labs
Industry UsageCommon in large tech firms, software companies, and organizations with complex compiler needsUsed across software development, embedded systems, and research projects

The main difference is that a Director Compiler Engineer focuses on leadership, strategy, and team management, while a Compiler Engineer concentrates on technical development and coding tasks. Both roles require strong technical skills, but the director role involves overseeing projects and guiding teams.

What are some common challenges faced by a Director Compiler Engineer, and how can they be addressed?

A Director Compiler Engineer often encounters challenges such as leading teams through complex technical problems, balancing project timelines with innovation, and ensuring cross-functional collaboration between hardware and software teams. Addressing these requires strong leadership, clear communication, and strategic planning to allocate resources efficiently. Additionally, staying up-to-date with evolving programming languages and hardware architectures is essential to guide the team and maintain competitive compiler performance.

What are the key skills and qualifications needed to thrive as a Director Compiler Engineer, and why are they important?

To thrive as a Director Compiler Engineer, you need deep expertise in compiler theory, programming languages, and computer architecture, often supported by an advanced degree in computer science or a related field. Proficiency with compiler toolchains (like LLVM or GCC), performance analysis tools, and version control systems is typically required, along with familiarity with modern programming languages such as C++ or Rust. Strong leadership, strategic thinking, and excellent communication skills are essential for guiding teams and collaborating with stakeholders. These skills ensure the development of robust, high-performance compiler solutions that align with organizational goals and technology strategies.
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What job categories do people searching Director Compiler Engineer jobs in Texas look for? The top searched job categories for Director Compiler Engineer jobs in Texas are:
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AI/ML Senior Principal Software Engineer

MIPS Holding Inc

Richardson, TX • On-site

$171 - $296/hr

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Job description

About GlobalFoundries

GlobalFoundries is a leading full‑service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies.

About the Role

We're looking for a seasoned AI/ML Staff Software Engineer to lead workload‑driven architecture strategy across hardware and software boundaries. You will define how we study, model, and optimize AI/ML workloads for current and next‑generation products, drive alignment across HW and SW engineering organizations, and serve as a technical authority on performance and architecture tradeoffs. This is a senior individual contributor role with significant cross‑functional scope and organizational influence.

Essential Responsibilities
  • Own workload characterization and hardware performance analysis for AI/ML systems— selecting representative workloads, defining measurement methodology, building support for MIPS products (e.g., the S8200), and projecting system‑level KPIs. Your findings will directly inform SoC architecture decisions, memory subsystem design, and HW/SW co‑optimization strategy.
  • Define the software frameworks across the product portfolio: what metrics matter, how to measure them accurately, how to estimate them pre‑silicon, and how to use them to make architectural bets. Leverage open‑source infrastructure like MLIR and IREE to implement and validate this work. Set the standard for how the team approaches this and mentor junior engineers in applying it.
  • Represent software in architectural discussions with hardware teams (CPU, SoC, memory, interconnect) and software teams (compilers, runtimes, ML frameworks).
  • Identify critical bottlenecks—compute throughput, DRAM bandwidth, on‑chip memory, data movement latency, or software overhead—and build the case for specific architectural changes or optimization investments.
  • Present findings and recommendations to senior engineering leadership and product stakeholders, writing both concise architectural recommendations and detailed technical memos as needed.
  • Ensure safety and support all EHS & Security requirements and programs.
Required Qualifications
  • BS or MS (preferred) in EE, CE, CS, or equivalent, with 5+ years in systems engineering, hardware architecture, ML systems, or performance engineering, and a track record of technical leadership.
  • Deep expertise in CPU and SoC architecture—memory hierarchies, out‑of‑order execution, vector/SIMD pipelines, power management—and how these interact with AI/ML workloads.
  • Strong command of system‑level memory bandwidth constraints (DDR/LPDDR bandwidth, channel configuration, utilization efficiency) and the ability to reason quantitatively about memory‑bound vs. compute‑bound workloads.
  • Experience with AI/ML acceleration on edge devices—NPUs, dedicated inference accelerators, DSP‑based pipelines—and the HW/SW co‑design challenges involved.
  • Familiarity with model quantization, sparsity, or other efficiency techniques and their hardware interaction.
  • Familiarity with AI compiler infrastructure: MLIR‑based toolchains, IREE, TVM, TFLite, or equivalent; understanding how graph representations are transformed, tiled, scheduled, and lowered to hardware.
  • Effective cross‑functional collaborator who can drive technical consensus without direct authority, writes clearly, and calibrates technical depth for different audiences.
Preferred Qualifications
  • Prior implementation of CPU hardware features such as vector extensions (AVX, NEON, RVV) or matrix extensions (AMX, SME).
  • Experience defining or co‑defining SoC architecture requirements from workload analysis.
  • Contributions to graph lowering in MLIR/IREE or similar compiler infrastructure.
  • Internal or external publications or contributions to technical standards.
  • Experience mentoring junior systems engineers.
  • Knowledge of RISC‑V architecture and Vector/Matrix extensions.
Other Requirements
  • English fluency (written and verbal).
  • Up to 10% travel.
  • US work authorization.
  • 100% in‑office (Dallas, Austin, or San Jose).
EEO Statement

GlobalFoundries is an equal‑opportunity employer, cultivating a diverse and inclusive workforce. All qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation, or medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations.

Salary

Expected Salary Range: $171,000.00 – $296,000.00 (exact salary determined based on qualifications, experience and location).

Location

Dallas, Austin, or San Jose (USA).

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