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Design Verification Internship Jobs in Virginia (NOW HIRING)

Fractile

Physical Design Engineer

Bristol, VA · On-site

$80 - $120/hr

You will collaborate with cross‑functional teams, including logic design, verification, and ... internships. * Familiarity with EDA tools for place & route, STA, and sign‑off. * Basic ...

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Design Verification Internship information

What are some common challenges faced during a design verification internship, and how can interns effectively overcome them?

Design Verification Interns often encounter challenges such as understanding complex hardware architectures, managing tight deadlines, and learning industry-standard verification languages like SystemVerilog or UVM. To overcome these, interns should proactively seek guidance from mentors, make use of available documentation, and engage in regular code reviews to improve their skills. Collaborating closely with other verification engineers and asking questions when uncertainties arise can also significantly smooth the learning curve and help interns deliver quality results.

What is the difference between Design Verification Internship vs Design Engineer?

AspectDesign Verification InternshipDesign Engineer
Required CredentialsTypically pursuing or recent graduate in Electrical, Computer Engineering, or related fieldsBachelor's or Master's in Engineering or related discipline, with relevant certifications often preferred
Work EnvironmentInternship setting, often in a corporate or R&D lab, with mentorshipFull-time professional role, responsible for designing and developing hardware/software components
Industry UsageCommonly used in semiconductor, electronics, and tech companies for entry-level rolesUsed across industries for product development and system design

While a Design Verification Internship focuses on learning and supporting verification tasks under supervision, a Design Engineer takes on full responsibility for designing and implementing hardware or software solutions. Internships serve as a stepping stone to full engineering roles, which require more experience and responsibility.

What is a design verification internship?

A Design Verification Internship is a temporary position, typically for students or recent graduates, where interns assist in verifying and validating the functionality of hardware designs, such as integrated circuits or system-on-chip (SoC) components. Interns work alongside experienced engineers to develop and execute tests, identify bugs, and ensure that designs meet specifications before they move to production. This role provides hands-on experience with industry-standard verification tools and methodologies, such as UVM, SystemVerilog, and simulation environments. It is an excellent opportunity for those interested in semiconductor or hardware engineering careers.

What are the key skills and qualifications needed to thrive as a design verification intern, and why are they important?

To thrive as a Design Verification Intern, you typically need a background in electrical or computer engineering, familiarity with digital design concepts, and coursework or experience in hardware description languages like Verilog or VHDL. Proficiency with verification tools such as SystemVerilog, UVM, and simulation environments is highly valued, alongside any related certifications or project experience. Strong problem-solving, attention to detail, and effective communication skills help you collaborate with engineers and debug complex design issues. These skills ensure accurate verification of hardware designs, reducing errors and contributing to efficient development cycles.
What are the most commonly searched types of Design Verification jobs in Virginia? The most popular types of Design Verification jobs in Virginia are:
What are popular job titles related to Design Verification Internship jobs in Virginia? For Design Verification Internship jobs in Virginia, the most frequently searched job titles are:
What job categories do people searching Design Verification Internship jobs in Virginia look for? The top searched job categories for Design Verification Internship jobs in Virginia are:
What cities in Virginia are hiring for Design Verification Internship jobs? Cities in Virginia with the most Design Verification Internship job openings:
Design Verification Internship jobs near you
Infographic showing various Design Verification Internship job openings in Virginia as of August 2026, with employment types broken down into 68% Full Time, 22% Part Time, and 10% Contract. Highlights an 80% In-person, and 20% Remote job distribution.

Physical Design Engineer

Fractile

Bristol, VA • On-site

$80 - $120/hr

Other

Posted 5 days ago

Job description

Fractile’s mission is to enable a new chapter in the AI revolution. We’re pioneering AI innovation where hardware and software join to create something extraordinary, unlocking the power of the world’s largest language models with speed increases of x100. Our team is rapidly expanding, and we're searching for visionary engineers, scientists, and thinkers who share our passion for pushing boundaries and redefining what's possible. If you're ready to join a dynamic group of innovators shaping AI's future, we want to hear from you!

We are seeking a Physical Design Engineer to contribute to our next‑generation chip designs. As a Physical Design Engineer, you will support the implementation of complex IC physical designs, from synthesis to sign‑off. You will collaborate with cross‑functional teams, including logic design, verification, and process technology, to optimise performance, power, and area (PPA) while ensuring design integrity and manufacturability.

Key Responsibilities:
  • Support the physical implementation of ASIC/SoC designs, including floor planning, placement, clock tree synthesis (CTS), routing, and sign‑off.
  • Work on synthesis, timing analysis (STA), and optimisation to achieve strong PPA metrics.
  • Assist in power planning and analysis, addressing IR drop, electromigration, and related effects.
  • Ensure design rule check (DRC), layout vs. schematic (LVS), and other physical verification compliance.
  • Collaborate with DFT engineers to integrate design‑for‑test (DFT) structures into the physical implementation.
  • Develop flows in EDA tools such as Cadence Innovus, Synopsys Fusion Compiler, Mentor Graphics Calibre, and others.
  • Work closely with RTL and architecture teams to support design feasibility, constraints, and physical‑aware RTL design.
  • Work with advanced AI tools and models to improve productivity, analysis, and design quality.
Preferred Qualifications:
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • 0–5 years of experience in physical design for advanced technology nodes (e.g., 7nm, 5nm, or below), including internships.
  • Familiarity with EDA tools for place & route, STA, and sign‑off.
  • Basic understanding of CMOS technology, semiconductor physics, and process limitations.
  • Exposure to timing closure, signal integrity, IR drop analysis, and formal verification.
  • Proficiency in scripting languages like TCL, Perl, or Python for automation is a plus.
  • Excellent problem‑solving skills, communication, and teamwork in a collaborative design environment.
  • Interest in working with advanced AI tools and models as part of the design workflow.
  • Experience or coursework in high‑performance computing (HPC), AI accelerators, or networking chips is a plus.
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