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Design Verification Internship Jobs in Oregon (NOW HIRING)

Intel

RTL Design Engineer

Hillsboro, OR · On-site

... and refine verification plans and tests to ensure correct implementation of design features ... internship experiences and or schoolwork/classes/research. Benefits at Intel Our total rewards ...

Intel

Physical Verification Engineer

Hillsboro, OR

$148K/yr

Drive quality improvements in design kits and documentation to remove barriers to successful ... experience, internship experience and / or schoolwork/classes/research. The preferred ...

Intel

Memory Circuit Design Engineer

Hillsboro, OR

... verification. * Knowledge of EDA tools used for custom digital and memory circuit design. Preferred Qualifications: * PhD with 1-2 years of professional experience gained through either internships ...

Qorvo, Inc.

RF Design Engineering Intern

Hillsboro, OR · On-site

$31 - $42/hr

Qorvo's Internship Program is designed for college students currently enrolled in an accredited ... Qorvo is an E-Verify Employer. For more information, please see the Right to Work and E-Verify ...

Intel Corporation

Sr. Logic Design Engineer

Hillsboro, OR · On-site

$142 - $200/hr

Reviews the verification plan and implementation to ensure design features are verified correctly ... internship experiences and or schoolwork/classes/research. Job Type and Location Job Type:

New

Intel

Sr. Logic Design Engineer

Hillsboro, OR · On-site

$141K - $200K/yr

... the verification plan and implementation to ensure design features are verified correctly and ... internship experiences and or schoolwork/classes/research. Job Type:Experienced Hire Shift:Shift 1 ...

Intel

RTL Design Engineer

Hillsboro, OR · On-site

$91K - $128K/yr

Review and contribute to verification plans to ensure design correctness. * Resolve and implement ... internship experiences and or schoolwork/classes/research. Note: This position is not eligible for ...

Intel

Senior CPU RTL Design Engineer

Hillsboro, OR

Reviews the verification plan and implementation to ensure design features are verified correctly ... internship experience. Benefits at Intel Our total rewards package goes above and beyond just a ...

Talanto

RTL Design Engineer

Hillsboro, OR · On-site

$91 - $129/hr

Review and contribute to verification plans to ensure design correctness. * Resolve and implement ... internship experiences and or schoolwork/classes/research. Note: This position is not eligible for ...

New

Intel

Sr. EDA Tools Engineer - PERC ESD

Hillsboro, OR

$118K - $160K/yr

... internship experiences Minimum Qualification * Master's degree or PhD in Electrical Engineering or Computer Engineering. * 3+ years of relevant industry experience in physical design verification ...

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Design Verification Internship information

What is a design verification internship?

A Design Verification Internship is a temporary position, typically for students or recent graduates, where interns assist in verifying and validating the functionality of hardware designs, such as integrated circuits or system-on-chip (SoC) components. Interns work alongside experienced engineers to develop and execute tests, identify bugs, and ensure that designs meet specifications before they move to production. This role provides hands-on experience with industry-standard verification tools and methodologies, such as UVM, SystemVerilog, and simulation environments. It is an excellent opportunity for those interested in semiconductor or hardware engineering careers.

What are the key skills and qualifications needed to thrive as a design verification intern, and why are they important?

To thrive as a Design Verification Intern, you typically need a background in electrical or computer engineering, familiarity with digital design concepts, and coursework or experience in hardware description languages like Verilog or VHDL. Proficiency with verification tools such as SystemVerilog, UVM, and simulation environments is highly valued, alongside any related certifications or project experience. Strong problem-solving, attention to detail, and effective communication skills help you collaborate with engineers and debug complex design issues. These skills ensure accurate verification of hardware designs, reducing errors and contributing to efficient development cycles.

What are some common challenges faced during a design verification internship, and how can interns effectively overcome them?

Design Verification Interns often encounter challenges such as understanding complex hardware architectures, managing tight deadlines, and learning industry-standard verification languages like SystemVerilog or UVM. To overcome these, interns should proactively seek guidance from mentors, make use of available documentation, and engage in regular code reviews to improve their skills. Collaborating closely with other verification engineers and asking questions when uncertainties arise can also significantly smooth the learning curve and help interns deliver quality results.

What is the difference between Design Verification Internship vs Design Engineer?

AspectDesign Verification InternshipDesign Engineer
Required CredentialsTypically pursuing or recent graduate in Electrical, Computer Engineering, or related fieldsBachelor's or Master's in Engineering or related discipline, with relevant certifications often preferred
Work EnvironmentInternship setting, often in a corporate or R&D lab, with mentorshipFull-time professional role, responsible for designing and developing hardware/software components
Industry UsageCommonly used in semiconductor, electronics, and tech companies for entry-level rolesUsed across industries for product development and system design

While a Design Verification Internship focuses on learning and supporting verification tasks under supervision, a Design Engineer takes on full responsibility for designing and implementing hardware or software solutions. Internships serve as a stepping stone to full engineering roles, which require more experience and responsibility.

What are the most commonly searched types of Design Verification jobs in Oregon?

The most popular types of Design Verification jobs in Oregon are:

What are popular job titles related to Design Verification Internship jobs in Oregon?

For Design Verification Internship jobs in Oregon, the most frequently searched job titles are:

What job categories do people searching Design Verification Internship jobs in Oregon look for?

The top searched job categories for Design Verification Internship jobs in Oregon are:

What cities in Oregon are hiring for Design Verification Internship jobs?

Cities in Oregon with the most Design Verification Internship job openings:

Design Verification Internship jobs near you
Infographic showing various Design Verification Internship job openings in Oregon as of August 2026, with employment types broken down into 100% Full Time. Highlights an 57% In-person, 29% Hybrid, and 14% Remote job distribution.

Senior Fabric Design Verification Engineer

Microsoft

Hillsboro, OR • On-site

$113K - $156K/yr

Full-time

Re-posted 12 days ago

Key responsibilities

  • Own or lead verification of complex flows at fabric interconnect or at block level

  • Develop UVM-based verification environments and run and debug simulations to drive quality

  • Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals

Microsoft rating

8.5

Company rating: 8.5 out of 10

Based on 132 frontline employees who took The Breakroom Quiz

80th of 247 rated software companies

Job description

Overview
Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for a Senior Fabric Design Verification Engineer to help achieve that mission.
The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantage to Microsoft and enable our customers to achieve more.
As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the CSME team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for a Senior Fabric Design Verification engineer for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.
We are looking for a Senior Fabric Design Verification Engineer to join the team.
Responsibilities
The candidate for this position will be expected and able to complete the following responsibilities:
  • Own or lead verification of complex flows at fabric interconnect or at block level
  • Learn about the design and interact with partner teams to define verification strategies and test plans
  • Develop UVM-based verification environments and run and debug simulations to drive quality
  • Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
  • Innovate to improve verification efficiency through methodologies or tools
  • Apply industry leading generative AI solutions to verification work
  • Share expertise and support the growth and development of others through coaching, mentorship, and collaboration.
  • Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion

Qualifications
Required Qualifications:
  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.

Other Requirements
  • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
  • This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

Preferred Qualifications:
  • 5+ years of pre-silicon subsystem or IP verification experience.
  • 7+ years of related technical engineering experience
    • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience or internship experience
    • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ year(s) technical engineering experience or internship experience.
    • OR Doctorate degree in Electrical Engineering, Computer Science, Computer Engineering, or related field.
  • Demonstrated experience in verifying designs that utilize Coherent Hub Interface (CHI) and Advanced Microcontroller Bus Architecture (AMBA) protocols.
  • Demonstrated experience in one or more of the following: fabric interconnects, coherency, virtualization, security, interrupts, PCIe, CXL, and/or protocol bridges.
  • Experience driving IP verification for a full product cycles from definition to silicon, including writing IP/block or subsystem level test plans, developing tests, debugging failures and coverage signoff.
  • Demonstrated hands-on technical leadership such as creating bottom's up schedules, coordinating work across a team, driving verification closure, or solving cross-team technical problems.
  • Experience creating, maintaining, or integrating test benches, checkers and stimulus using Universal Verification Methodology (UVM), System Verilog Test Bench (SVTB), and optionally Python based post-processing checking.
  • Aptitude for writing scripts/software with industry standard languages like Python.
  • Experience applying generative AI to day-to-day tasks.

#SCHIE #CSME
Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
https://careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

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About Microsoft

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Our infrastructure is comprised of a large global portfolio of more than 100 datacenters and 1 million servers. Our foundation is built upon and managed by a team of subject matter experts working to support services for more than 1 billion customers and 20 million businesses in over 90 countries worldwide. With environmental sustainability and optimization at the forefront of our datacenter design and operations, we continue to grow and evolve as we meet the ever-changing business demands that hold Microsoft as a world-class cloud provider.

Industry

Computer and computer peripheral equipment and software wholesalers

Company size

10,000+ Employees

Headquarters location

Redmond, WA, US

Year founded

1975

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