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Design Verification Intern Jobs (NOW HIRING)

Etched

DV Intern

San Jose, CA · On-site

Job Summary As aDesign Verification intern, you will ensure the custom IPs powering our chips ... Familiarity with verification work and writing test benches * Familiarity with physical design ...

PENTAX Medical

Research and Development Intern

Montvale, NJ · On-site

$15.75 - $21/hr

The Software Verification Intern/Co-op supports the engineering and test teams by assisting in the ... Learn how to interpret Software Requirements Specifications (SRS) and Detailed Design ...

PENTAX Medical

Research and Development Intern

Montvale, NJ · On-site

$15.75 - $21/hr

The Software Verification Intern/Co‑op supports the engineering and test teams by assisting in ... Learn how to interpret Software Requirements Specifications (SRS) and Detailed Design ...

Gentex Corp

Design/Model Shop Intern

Norwood, MA

The design Intern will focus on assisting full time designers to create 3D models and physical ... Gentex is an E-Verify Participant. Pre-employment drug/alcohol/background screening is required.

Gentex Corp.

Design/Model Shop Intern

Norwood, MA · On-site

The design Intern will focus on assisting full time designers to create 3D models and physical ... Gentex is an E-Verify Participant. Pre-employment drug/alcohol/background screening is required.

Ambarella

Logic design, implementation, and verification using Verilog, System Verilog, and any required programing and scripting languages. * Synthesize and optimize RTL for timing, area and power.

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How much do design verification intern jobs pay per hour?

As of Jun 2, 2026, the average hourly pay for design verification intern in the United States is $19.38, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $21.63 per hour, depending on experience, location, and employer.

What does a Design Verification Intern do?

A Design Verification Intern assists in testing and validating semiconductor designs to ensure they meet specifications. They work with simulation tools, write testbenches in languages like SystemVerilog, and debug design issues. Interns collaborate with engineers to develop verification plans and automate testing processes. This role provides hands-on experience in hardware design, verification methodologies, and industry tools used in chip development.

What are the key skills and qualifications needed to thrive in the Design Verification Intern position, and why are they important?

To thrive as a Design Verification Intern, you need a solid understanding of digital logic design, computer architecture, and programming, typically supported by coursework in electrical or computer engineering. Familiarity with hardware description languages (such as Verilog or VHDL), simulation tools, and verification methodologies (like UVM or SystemVerilog Assertions) is highly valuable. Strong analytical thinking, attention to detail, and clear communication skills help you collaborate effectively, document findings, and resolve design issues. These competencies are crucial for ensuring high-quality, reliable hardware designs and for contributing meaningfully within engineering teams.

What types of projects or tasks can I expect to work on as a Design Verification Intern?

As a Design Verification Intern, you will typically assist with creating and executing testbenches, developing verification plans, debugging simulation results, and writing scripts to automate testing. You'll work closely with verification engineers and design teams to identify design flaws, validate new features, and help ensure that products meet quality and functional requirements. This hands-on exposure not only deepens your technical skills but also provides insight into the end-to-end hardware development process. You'll frequently collaborate and communicate findings in team meetings, making it a great opportunity to build experience in a real-world engineering environment.
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Design Verification Intern jobs near you
Infographic showing various Design Verification Intern job openings in the United States as of May 2026, with employment types broken down into 14% Internship, 43% Full Time, and 43% Part Time. Highlights an 95% Physical, 2% Hybrid, and 3% Remote job distribution, with an average salary of $40,304 per year, or $19.4 per hour.

DV Intern

Etched

San Jose, CA • On-site

Internship

Posted 25 days ago

Job description

About Etched
Etched is building the world's first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As aDesign Verification intern, you will ensure the custom IPs powering our chips - including systolic arrays, DMA engines, and NoCs - are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack. We are looking for Fall '26, Spring '27, and Summer '27 interns.
You may be a good fit if you have
  • Progress towards a Bachelor's, Master's, or PhD degree in electrical engineering, computer engineering, or a related field.
  • Familiarity with high-speed digital logic
  • Exposure to ASIC or SoC design concepts
  • Familiarity with SystemVerilog, UVM, or Python
  • Familiarity with verification work and writing test benches
  • Familiarity with physical design flows and tooling
  • Are able to learn quickly about transformers and other aspects of modern artificial intelligence

Strong candidates may also have experience with
  • Familiarity with transformer models and machine learning
  • UVM or formal verification experience
  • Ability to program with Python or another scripting language

We encourage you to apply even if you do not believe you meet every single qualification.
Program details
  • 12-week paid internship
  • Generous housing support for those relocating
  • Daily lunch and dinner in our office
  • Based at our office in San Jose, CA
  • Direct mentorship from industry leaders and world-class engineers
  • Opportunity to work on one of the most important problems of our time

For any questions, contact internships@etched.com
How we're different
Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.

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