As an Physical Design Manager Engineering Manager, you will combine hands-on technical leadership with people management, owning physical design execution from RTL to GDSII while building and ...
As an Physical Design Manager Engineering Manager, you will combine hands-on technical leadership with people management, owning physical design execution from RTL to GDSII while building and ...
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Design Engineer Manager information
See Ontario salary details
$70.5K - $78.5K
8% of jobs
$82.3K is the 25th percentile. Wages below this are outliers.
$78.5K - $86.5K
35% of jobs
The median wage is $92.3K / yr.
$86.5K - $94.5K
9% of jobs
$94.5K - $102.5K
6% of jobs
$102.5K - $110.5K
8% of jobs
$110.5K - $118.5K
3% of jobs
$118.5K - $126.5K
3% of jobs
$129.8K is the 75th percentile. Wages above this are outliers.
$126.5K - $134.5K
3% of jobs
$134.5K - $142.5K
3% of jobs
$142.5K - $150.5K
4% of jobs
$150.5K - $158.5K
16% of jobs
$70.5K
$107K
$158.5K
How much do design engineer manager jobs pay per year?
What engineers make $300,000 a year?
How does a Design Engineer Manager typically balance technical project responsibilities with team leadership duties?
What does a Design Engineer Manager do?
What does a design engineering manager do?
What engineers make 200,000 a year?
What are the key skills and qualifications needed to thrive as a Design Engineer Manager, and why are they important?
What engineer makes $500,000 a year?
What is the difference between Design Engineer Manager vs Design Engineer?
| Aspect | Design Engineer Manager | Design Engineer |
|---|---|---|
| Credentials | Bachelor's or Master's in Engineering, leadership experience | Bachelor's or Master's in Engineering |
| Work Environment | Oversees teams, manages projects, strategic planning | Designs products, develops prototypes, technical tasks |
| Employer & Industry Usage | Engineering firms, manufacturing, aerospace, automotive | Same industries, focused on technical design work |
The main difference is that a Design Engineer Manager leads teams and manages projects, while a Design Engineer focuses on technical design and development tasks. The manager role involves leadership and strategic planning, whereas the engineer role emphasizes hands-on design work.
Job description
Role Overview
Astera Labs is seeking a Physical Design Engineering Manager to lead a team of physical design engineers at our Toronto site, driving the implementation of connectivity ASICs within our Signal Connectivity Group. This group is responsible for products that enable high-speed serial connectivity including PCIe retimers, Ethernet retimers, and signal conditioning solutions deployed across the world's largest AI clusters and hyperscale data centers.
As an Physical Design Manager Engineering Manager, you will combine hands-on technical leadership with people management, owning physical design execution from RTL to GDSII while building and mentoring a high-performing team. You will drive floorplanning, place-and-route, timing closure, and sign-off for complex designs requiring deep understanding of high-speed physical layer interfaces and SerDes integration at TSMC advanced nodes. This role is fully on-site at our Toronto location.
Basic Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field; Master's preferred.
- 10+ years of experience in physical design implementation of complex SoCs at advanced nodes (7nm and below).
- 2+ years of experience leading teams or projects with demonstrated ability to mentor and develop engineers.
- Hands-on expertise across the physical design flow: synthesis, place-and-route, CTS, extraction, timing closure, EM-IR, DRC/LVS, and equivalence checking.
- Proficiency with Cadence Innovus and/or Synopsys Fusion Compiler/ICC2 and supporting toolchains.
- Strong scripting ability in Tcl, Python, and/or Perl.
- Professional attitude with the ability to prioritize a dynamic list of tasks, plan and prepare for customer meetings in advance, and work with minimal guidance.
- Entrepreneurial, open-minded behavior and can-do attitude. Think and act fast with the customer in mind!
Required Experience
- Build, lead, and mentor a physical design team, owning Physical Design execution and team development for Signal Connectivity Group products.
- Drive block and top-level physical design implementation from floorplan through tapeout for retimer and signal conditioning ASICs.
- Collaborate with RTL, DFT, STA, EMIR, and verification teams to drive design convergence from synthesis through sign-off.
- Work with IP vendors for both RTL and hard-macro integration, ensuring placement constraints and routing guidelines are met.
- Drive team execution, hiring, career development, and sprint planning for the Toronto PD team.
- Establish physical design best practices, flow improvements, and quality checks to scale execution across multiple concurrent programs.
- Coordinate with global PD teams (San Jose, Irvine, Bangalore) to ensure consistent methodology and design quality.
- Experience with Cadence and/or Synopsys physical design tools/flows.
Preferred Experience/Nice to Have
- Deep understanding of high-speed SerDes physical layer, including equalization, CDR, and signal integrity considerations impacting physical design.
- Knowledge of physical layer timing challenges specific to high-speed serial interfaces.
- Track record of building and scaling physical design teams through multiple tapeouts.
- Knowledge of agentic AI solutions for EDA automation.
Base salary range is CAD 180,000 to CAD 220,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives, and benefits.
About Astera Labs
Sourced by ZipRecruiter
Industry
Semiconductor and electronic component manufacturing
Company size
11 - 50 Employees
Headquarters location
Santa Clara, CA, US
Year founded
2017