The IC Layout Automation Software Engineer will collaborate with cross-functional teams to enhance tools for designing and fabricating quantum devices. Responsibilities : • Design, develop, and ...
The IC Layout Automation Software Engineer will collaborate with cross-functional teams to enhance tools for designing and fabricating quantum devices. Responsibilities : • Design, develop, and ...
ASIC & FPGA Design Engineer Sr Stf - E5
Orlando, FL · On-site +1
$185K/yr
... methodology standardization across the department Why Join Us Do you want to be part of a company ... Minimum 12 years of experience in full-custom analog or mixed-signal IC layout design (or 10+ years ...
ASIC & FPGA Design Engineer Sr Stf - E5
Orlando, FL · On-site +1
$185K/yr
... methodology standardization across the department Why Join Us Do you want to be part of a company ... Minimum 12 years of experience in full-custom analog or mixed-signal IC layout design (or 10+ years ...
ASIC & FPGA Design Engineer Sr Stf - E5
Orlando, FL · On-site
$185K - $344K/yr
... methodology standardization across the department Why Join Us Do you want to be part of a company ... full-custom analog or mixed-signal IC layout design (or 10+ years with a Bachelor's degree in a ...
ASIC & FPGA Design Engineer Sr Stf - E5
Orlando, FL · On-site
$185K - $344K/yr
... methodology standardization across the department Why Join Us Do you want to be part of a company ... full-custom analog or mixed-signal IC layout design (or 10+ years with a Bachelor's degree in a ...
RFIC Design Engineer
Mountain View, CA · On-site
Conduct full-custom IC layout or direct layout engineers, ensuring DRC/LVS-clean designs at mmWave frequencies. * Perform post-layout extraction and EM simulation (Ansys HFSS, EMX, ADS Momentum) to ...
New
RFIC Design Engineer
Mountain View, CA · On-site
Conduct full-custom IC layout or direct layout engineers, ensuring DRC/LVS-clean designs at mmWave frequencies. * Perform post-layout extraction and EM simulation (Ansys HFSS, EMX, ADS Momentum) to ...
New
RFIC Design Engineer
Mountain View, CA · On-site
Conduct full-custom IC layout or direct layout engineers, ensuring DRC/LVS-clean designs at mmWave frequencies. * Perform post-layout extraction and EM simulation (Ansys HFSS, EMX, ADS Momentum) to ...
New
RFIC Design Engineer
Mountain View, CA · On-site
Conduct full-custom IC layout or direct layout engineers, ensuring DRC/LVS-clean designs at mmWave frequencies. * Perform post-layout extraction and EM simulation (Ansys HFSS, EMX, ADS Momentum) to ...
New
Senior High Speed Mixed-Signal I/O & Analog Layout Engineer
San Jose, CA · On-site +1
$100 - $110/hr
Strong experience with custom analog and mixed-signal IC layout. Proficiency with Cadence Virtuoso ... engineering teams. Self-motivated with the ability to work independently while managing multiple ...
Senior High Speed Mixed-Signal I/O & Analog Layout Engineer
San Jose, CA · On-site +1
$100 - $110/hr
Strong experience with custom analog and mixed-signal IC layout. Proficiency with Cadence Virtuoso ... engineering teams. Self-motivated with the ability to work independently while managing multiple ...
IC Layout Co-op (Summer/Fall 2027)
Cedar Rapids, IA · On-site
$22.50 - $42/hr
... IC Layout Co-Op with expertise in Silicon Integrated Circuit Layout ... In this role, you work with experienced engineering professionals to understand and lay out silicon ...
New
IC Layout Co-op (Summer/Fall 2027)
Cedar Rapids, IA · On-site
$22.50 - $42/hr
... IC Layout Co-Op with expertise in Silicon Integrated Circuit Layout ... In this role, you work with experienced engineering professionals to understand and lay out silicon ...
New
... custom IC design - transistor-level timing verification using NanoTime and formal verification ... layout, and EDA vendor teams to resolve tool and methodology issues Experience developing or ...
... custom IC design - transistor-level timing verification using NanoTime and formal verification ... layout, and EDA vendor teams to resolve tool and methodology issues Experience developing or ...
IC Layout Co-op (Summer/Fall 2027)
Cedar Rapids, IA · On-site
$26 - $47.50/hr
... IC Layout Co-Op with expertise in Silicon Integrated Circuit Layout ... In this role, you work with experienced engineering professionals to understand and lay out silicon ...
New
IC Layout Co-op (Summer/Fall 2027)
Cedar Rapids, IA · On-site
$26 - $47.50/hr
... IC Layout Co-Op with expertise in Silicon Integrated Circuit Layout ... In this role, you work with experienced engineering professionals to understand and lay out silicon ...
New
Sr. Analog Physical Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ... Develop and maintain layout methodologies and documentation to ensure efficient and consistent ...
Sr. Analog Physical Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ... Develop and maintain layout methodologies and documentation to ensure efficient and consistent ...
IC Layout Co-op (Summer/Fall 2027)
Cedar Rapids, IA · On-site
$22.50 - $42/hr
... IC Layout Co-Op with expertise in Silicon Integrated Circuit Layout ... In this role, you work with experienced engineering professionals to understand and lay out silicon ...
New
IC Layout Co-op (Summer/Fall 2027)
Cedar Rapids, IA · On-site
$22.50 - $42/hr
... IC Layout Co-Op with expertise in Silicon Integrated Circuit Layout ... In this role, you work with experienced engineering professionals to understand and lay out silicon ...
New
... engineering staff. * Skill in developing and applying custom layout, floor‑planning ... Project leadership in quality optimization, die‑size shrinkage, and IC layout design with NAND ...
... engineering staff. * Skill in developing and applying custom layout, floor‑planning ... Project leadership in quality optimization, die‑size shrinkage, and IC layout design with NAND ...
Sr. Analog Physical Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ... Develop and maintain layout methodologies and documentation to ensure efficient and consistent ...
Sr. Analog Physical Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ... Develop and maintain layout methodologies and documentation to ensure efficient and consistent ...
Layout Design Engineer
Austin, TX · On-site
Associates Degree in Electronic/IC layout CAD specialization or related program and 10+years of IC ... Proactively work with design engineers to achieve efficient circuit performance * Design analog ...
Layout Design Engineer
Austin, TX · On-site
Associates Degree in Electronic/IC layout CAD specialization or related program and 10+years of IC ... Proactively work with design engineers to achieve efficient circuit performance * Design analog ...
Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ... Develop and maintain layout methodologies and documentation to ensure efficient and consistent ...
Quick apply
Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ... Develop and maintain layout methodologies and documentation to ensure efficient and consistent ...
Sr. Analog Physical Design Engineer
$156K - $160K/yr
Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ... Develop and maintain layout methodologies and documentation to ensure efficient and consistent ...
Sr. Analog Physical Design Engineer
$156K - $160K/yr
Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ... Develop and maintain layout methodologies and documentation to ensure efficient and consistent ...
Layout Engineer
Kirkland, WA · On-site +1
Performing layout of custom mixed-signal and analog circuits blocks. * Work closely with circuit ... Familiar & understand CMOS and BiCMOS technology and IC Design principles. * Understanding of CAD ...
Layout Engineer
Kirkland, WA · On-site +1
Performing layout of custom mixed-signal and analog circuits blocks. * Work closely with circuit ... Familiar & understand CMOS and BiCMOS technology and IC Design principles. * Understanding of CAD ...
Staff Layout Designer
San Jose, CA · On-site
$72 - $122/hr
... custom layout, floor‑planning, signal‑planning, and power‑planning methodologies * Strong ... IC layout design experience with NAND, DRAM, and/or SRAM * Programming skills and AI experience ...
Staff Layout Designer
San Jose, CA · On-site
$72 - $122/hr
... custom layout, floor‑planning, signal‑planning, and power‑planning methodologies * Strong ... IC layout design experience with NAND, DRAM, and/or SRAM * Programming skills and AI experience ...
IC Layout Design
Greensboro, NC · On-site
For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal ... Solving layout design issues and applying proactive intervention * Proactively work with design ...
IC Layout Design
Greensboro, NC · On-site
For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal ... Solving layout design issues and applying proactive intervention * Proactively work with design ...
Layout Engineer
Kirkland, WA · On-site
Performing layout of custom mixed-signal and analog circuits blocks. * Work closely with circuit ... Familiar & understand CMOS and BiCMOS technology and IC Design principles. * Understanding of CAD ...
Layout Engineer
Kirkland, WA · On-site
Performing layout of custom mixed-signal and analog circuits blocks. * Work closely with circuit ... Familiar & understand CMOS and BiCMOS technology and IC Design principles. * Understanding of CAD ...
Custom Ic Layout Methodology Engineer information
See salary details
$45K - $57.8K
4% of jobs
$57.8K - $70.5K
2% of jobs
$70.5K - $83.3K
12% of jobs
$93.7K is the 25th percentile. Wages below this are outliers.
$83.3K - $96.1K
9% of jobs
$96.1K - $108.9K
11% of jobs
The median wage is $120.7K / yr.
$108.9K - $121.6K
14% of jobs
$121.6K - $134.4K
22% of jobs
$136.8K is the 75th percentile. Wages above this are outliers.
$134.4K - $147.2K
9% of jobs
$147.2K - $160K
9% of jobs
$160K - $172.7K
3% of jobs
$172.7K - $185.5K
6% of jobs
$45K
$120.8K
$185.5K
How much do custom ic layout methodology engineer jobs pay per year?
What are popular job titles related to Custom Ic Layout Methodology Engineer jobs?
For Custom Ic Layout Methodology Engineer jobs, the most frequently searched job titles are:
IC Layout Automation Software Engineer
Fremont, CA • On-site
Full-time
Re-posted 29 days ago
Job description
Rigetti Computing is a pioneer in full-stack quantum computing, developing and maintaining software systems for superconducting quantum circuits. The IC Layout Automation Software Engineer will collaborate with cross-functional teams to enhance tools for designing and fabricating quantum devices.
Responsibilities:
• Design, develop, and maintain production-quality software systems for IC layout generation and design workflows
• Refactor and improve existing codebases to increase maintainability, usability, and performance
• Build scalable and extensible software architectures that support evolving design and fabrication requirements
• Ensure code quality through best practices in testing, documentation, and version control
• Translate design and fabrication requirements into layout-ready implementations
• Work with GDSII and IC layout formats to generate, manipulate, and validate layout data
• Develop and maintain tooling that supports layout generation, verification, and iteration
• Integrate software workflows with existing EDA tools and design environments
• Partner closely with design, fabrication, and research teams to understand requirements and deliver effective solutions
• Collaborate with stakeholders to define workflows and improve how design requests are translated into implementation
• Support users across multiple technical domains, improving usability and reducing friction in tooling
• Contribute to prioritization discussions across competing stakeholder needs
• Improve usability and accessibility of internal design tools to reduce errors and increase efficiency
• Identify and address gaps in current workflows, proposing more robust and user-friendly solutions
• Support the evolution of tooling from ad hoc usage toward more structured and scalable systems
• Balance reactive work (stabilization, bug fixing) with proactive development of new capabilities
Qualifications:
Required:
• B.S., M.S., or Ph.D. in Computer Science, Electrical Engineering, Computer Engineering, Physics, Applied Physics, Materials Science, or a related technical field.
• Strong proficiency in Python, with experience developing and maintaining production-quality software in a real-world engineering or technical environment.
• Proven ability to own and improve complex, long-lived codebases, including refactoring, architecture decisions, testing, documentation, and maintainability.
• Experience working with IC layout data and formats, including GDSII.
• Familiarity with EDA / IC layout tooling such as KLayout, gdspy, Cadence, or similar platforms.
• Strong communication skills, with the ability to operate across teams that use different technical language and workflows.
• Working knowledge of semiconductor fabrication workflows, with exposure to lithography processes.
• Familiarity with lithography required; experience with e-beam lithography a strong plus.
• Ability to translate design, fabrication, or process requirements into reliable software implementations.
• Demonstrated ability to work cross-functionally with stakeholders across software, hardware, design, fabrication, and research teams.
• Ability to manage ambiguity, prioritize competing requests, and bring structure to evolving technical systems.
• Comfortable working closely with cleanroom, fab, or lab-based teams in an R&D environment.
Company:
Rigetti Computing is a quantum computing company that builds and deploys full-stack quantum systems with superconducting qubits. Founded in 2013, the company is headquartered in Berkeley, USA, with a team of 51-200 employees. The company is currently Growth Stage.
About Rigetti Computing
Sourced by ZipRecruiter
Industry
It services
Company size
51 - 200 Employees
Headquarters location
Berkeley, CA, US
Year founded
2013