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Cpu Rtl Design Engineer Jobs in Oakland, CA (NOW HIRING)

Etched

RTL Design Engineer

San Jose, CA · On-site

$150K - $275K/yr

  • Medical

  • Dental

  • Vision

Job Summary As an RTL Engineer at Etched, you will be critical in ensuring that our AI chips operate correctly and efficiently. You will develop and implement design verification strategies for both ...

SambaNova

Principal RTL Design Engineer

San Jose, CA · On-site

  • Medical

  • Dental

  • Vision

  • Life

About the role SambaNova Systems is looking for a Principal RTL Design Engineer to own the microarchitecture and RTL for a major block or subsystem of our next-generation Reconfigurable Dataflow Unit ...

New

Baidu USA

CPU Digital Design Engineer

Sunnyvale, CA · On-site

$159K/yr

A t least 3 years of CPU related Architect/RTL/Verification/Implementation design experience * K ... P hD in Electrical Engineering, Computer Science or Computer Engineering is a PLUS. * 5 + years of ...

Baidu USA

CPU Digital Design Engineer

Sunnyvale, CA · On-site

$159K/yr

Minimum Qualifications: - Master Degree in Electrical Engineering, Computer Science or Computer Engineering. - At least 3 years of CPU related Architect/RTL/Verification/Implementation design ...

SpaceX

Sr. RTL Design Engineer (Silicon Engineering)

Palo Alto, CA · On-site

$175K - $280K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

SR. RTL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building ... Experience with embedded CPU subsystems * Experience with standard bus protocols (e.g. AXI, AHB ...

Etched

RTL Design Engineer

San Jose, CA · On-site

$150K - $275K/yr

  • Medical

  • Dental

  • Vision

Job Summary As an RTL Engineer at Etched, you will be critical in ensuring that our AI chips operate correctly and efficiently. You will develop and implement design verification strategies for both ...

iFlow Inc

Power Engineer (RTL Design)

Sunnyvale, CA · On-site

Power Engineer (RTL Design) Location:Sunnyvale CA or Austin TX Duration: Long term Experience:8-15 Years DESCRIPTION: Please look for design engineers with power analysis experience Verification ...

Google

RTL Design Engineer, TPU

Sunnyvale, CA · On-site

You will design RTL Intellectual Property (IP) with the focus on management and control subsystem ... that enable developers to build the future. From software to hardware our teams are shaping the ...

Google

RTL Design Engineer, TPU and ML

Sunnyvale, CA · On-site

Experience optimizing RTL solutions, RTL design methodologies and automate front-end engineering flows. About the job In this role, you'll work to shape the future of AI/ML hardware acceleration. You ...

Google

TPU RTL Design Engineer

Sunnyvale, CA · On-site

$159K/yr

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. * 2 years of experience in ASIC RTL design, with a focus on ...

SpaceX

Sr. RTL Design Engineer (Silicon Engineering)

Palo Alto, CA · On-site

$175K - $280K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

... SR. RTL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in ... Experience with embedded CPU subsystems * Experience with standard bus protocols (e.g. AXI, AHB ...

TetraMem INC

ASIC RTL/SoC Design Engineer

Fremont, CA · On-site

  • Medical

  • Retirement

  • PTO

... Engineering with emphasis on RTL/SoC/digital design * Experience with Verilog and system Verilog ... Working knowledge of SoC architecture such as CPU, GPU or accelerators * Familiarity with: UVM ...

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All JobsCpu Rtl Design Engineer JobsCpu Rtl Design Engineer Jobs in Oakland, CA

Cpu Rtl Design Engineer information

See Oakland, CA salary details

$46.5K

$101.2K

$182K

How much do cpu rtl design engineer jobs pay per year?

As of Aug 19, 2026, the average yearly pay for cpu rtl design engineer in Oakland, CA is $101,238.00, according to ZipRecruiter salary data. Most workers in this role earn between $78,100.00 and $113,100.00 per year, depending on experience, location, and employer.

What is a CPU RTL design engineer?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.

What are the key skills and qualifications needed to thrive as a CPU RTL design engineer?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What are some common challenges faced by CPU RTL design engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What job categories do people searching Cpu Rtl Design Engineer jobs in Oakland, CA look for?

The top searched job categories for Cpu Rtl Design Engineer jobs in Oakland, CA are:

What cities near Oakland, CA are hiring for Cpu Rtl Design Engineer jobs?

Cities near Oakland, CA with the most Cpu Rtl Design Engineer job openings:

Cpu Rtl Design Engineer jobs near you
Infographic showing various Cpu Rtl Design Engineer job openings in Oakland, CA as of August 2026, with employment types broken down into 86% Full Time, 11% Part Time, and 3% Contract. Highlights an 82% Physical, 5% Hybrid, and 13% Remote job distribution, with an average salary of $101,238 per year, or $48.7 per hour.

RTL Design Engineer

Etched

San Jose, CA • On-site

$150K - $275K/yr

Full-time

Medical, Dental, Vision

Re-posted 6 days ago

Job description

About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As an RTL Engineer at Etched, you will be critical in ensuring that our AI chips operate correctly and efficiently. You will develop and implement design verification strategies for both our existing and upcoming ASIC designs.
In this role, you will work closely with state-of-the-art architectures for machine learning. You do not need to have experience working with these yet, but you will be willing and able to learn quickly. You will work in a fast-paced environment with a high degree of autonomy, and be responsible for a key part of Etched's success.
Representative projects
  • Implement a block to efficiently compute floating point math operators
  • Provide feedback to the uArch team to make sure blocks meet timing and area constraints

You may be a good fit if you
  • At least 5 years of work experience in RTL development.
  • Experience with high-speed digital logic.
  • Proficiency in standard RTL design and synthesis tools
  • Familiarity with verification work and writing test benches
  • Are able to learn quickly about transformers and other aspects of modern artificial intelligence
  • Willing to start quickly

Strong candidates may also have experience with (Nice-to-have qualifications)
  • Experience with PCIe, Ethernet, or HBM technologies
  • Familiarity with modern ML and LLM model architectures.
  • Familiarity with numerical representations and functions
  • Ability to program with Python or another scripting language

We encourage you to apply even if you do not believe you meet every single qualification.
Benefits
  • Medical, dental, and vision packages with generous premium coverage
    • $500 per month credit for waiving medical benefits
  • Housing subsidy of $2k per month for those living within walking distance of the office
  • Relocation support for those moving to San Jose (Santana Row)
  • Various wellness benefits covering fitness, mental health, and more
  • Daily lunch + dinner in our office
  • Unlimited compute budget subject to ROI justification

How we're different:
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.

Apply