... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...
... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...
... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...
... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...
... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...
... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...
... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...
... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...
... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...
... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...
You are an experienced RTL design engineer with strong communication skills. You have a passion for ... Proven experience designing logic blocks in CPU, GPU, NOC, or cache designs. * Excellent knowledge ...
You are an experienced RTL design engineer with strong communication skills. You have a passion for ... Proven experience designing logic blocks in CPU, GPU, NOC, or cache designs. * Excellent knowledge ...
... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...
... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...
RTL Design/AMS Verification Engineer
Richardson, TX · On-site +1
$122K - $149K/yr
RTL Design/AMS Verification Engineer Join IC Enable and Help Shape the Future of Semiconductor Innovation For more than 20 years, IC Enable has delivered world-class design IP, semiconductor products ...
RTL Design/AMS Verification Engineer
Richardson, TX · On-site +1
$122K - $149K/yr
RTL Design/AMS Verification Engineer Join IC Enable and Help Shape the Future of Semiconductor Innovation For more than 20 years, IC Enable has delivered world-class design IP, semiconductor products ...
Senior CPU Design Engineer
Austin, TX · Hybrid
We are looking for a Senior CPU Design Engineer!NVIDIA is seeking best-in-class CPU Design ... Implement in RTL and coordinate execution with the verification team to ensure that the design is ...
Senior CPU Design Engineer
Austin, TX · Hybrid
We are looking for a Senior CPU Design Engineer!NVIDIA is seeking best-in-class CPU Design ... Implement in RTL and coordinate execution with the verification team to ensure that the design is ...
... SR. RTL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in ... Experience with embedded CPU subsystems * Experience with standard bus protocols (e.g. AXI, AHB ...
... SR. RTL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in ... Experience with embedded CPU subsystems * Experience with standard bus protocols (e.g. AXI, AHB ...
Design Engineering Architect
Austin, TX · On-site
This is a challenging and rewarding opportunity is for a highly motivated engineer with a passion ... IP (CPU, Memory, Interface) integration *Expert in RTL design (Verilog), simulators debuggers
Design Engineering Architect
Austin, TX · On-site
This is a challenging and rewarding opportunity is for a highly motivated engineer with a passion ... IP (CPU, Memory, Interface) integration *Expert in RTL design (Verilog), simulators debuggers
This is a challenging and rewarding opportunity is for a highly motivated engineer with a passion ... IP (CPU, Memory, Interface) integration *Expert in RTL design (Verilog), simulators debuggers
This is a challenging and rewarding opportunity is for a highly motivated engineer with a passion ... IP (CPU, Memory, Interface) integration *Expert in RTL design (Verilog), simulators debuggers
Sr. CPU RTL Front End Methodology Engineer
$121K - $167K/yr
As part of our team, you will help design the next generation of high-performance microprocessors ... As a Sr. CPU RTL Methodology Engineer your responsibilities will include but are not limited to:
Sr. CPU RTL Front End Methodology Engineer
$121K - $167K/yr
As part of our team, you will help design the next generation of high-performance microprocessors ... As a Sr. CPU RTL Methodology Engineer your responsibilities will include but are not limited to:
Sr. CPU RTL Front End Methodology Engineer
Austin, TX · On-site
$121K - $167K/yr
As part of our team, you will help design the next generation of high-performance microprocessors ... As a Sr. CPU RTL Methodology Engineer your responsibilities will include but are not limited to:
Sr. CPU RTL Front End Methodology Engineer
Austin, TX · On-site
$121K - $167K/yr
As part of our team, you will help design the next generation of high-performance microprocessors ... As a Sr. CPU RTL Methodology Engineer your responsibilities will include but are not limited to:
Senior/Staff Design Engineer
$69K - $202K/yr
... Design Engineer ... Responsible for developing and owning RTL development of our latest AI-enabled RISC-V CPU core. The ...
Senior/Staff Design Engineer
$69K - $202K/yr
... Design Engineer ... Responsible for developing and owning RTL development of our latest AI-enabled RISC-V CPU core. The ...
Senior/Staff Design Engineer
$69K - $202K/yr
... Design Engineer ... Responsible for developing and owning RTL development of our latest AI-enabled RISC-V CPU core. The ...
Senior/Staff Design Engineer
$69K - $202K/yr
... Design Engineer ... Responsible for developing and owning RTL development of our latest AI-enabled RISC-V CPU core. The ...
This is a challenging and rewarding opportunity is for a highly motivated engineer with a passion ... IP (CPU, Memory, Interface) integration *Expert in RTL design (Verilog), simulators debuggers
This is a challenging and rewarding opportunity is for a highly motivated engineer with a passion ... IP (CPU, Memory, Interface) integration *Expert in RTL design (Verilog), simulators debuggers
This is a challenging and rewarding opportunity is for a highly motivated engineer with a passion ... IP (CPU, Memory, Interface) integration *Expert in RTL design (Verilog), simulators debuggers
This is a challenging and rewarding opportunity is for a highly motivated engineer with a passion ... IP (CPU, Memory, Interface) integration *Expert in RTL design (Verilog), simulators debuggers
CPU Micro-Architect RTL Engineer
Austin, TX · On-site
$98K - $147K/yr
Qualcomm is the world's largest fabless design company, delivering cutting-edge hardware, software ... Engineering, or a related field * 1-3 years of experience in CPU architecture and RTL design ...
CPU Micro-Architect RTL Engineer
Austin, TX · On-site
$98K - $147K/yr
Qualcomm is the world's largest fabless design company, delivering cutting-edge hardware, software ... Engineering, or a related field * 1-3 years of experience in CPU architecture and RTL design ...
Interconnect Micro-architect/RTL Design Engineer
Austin, TX · On-site
$156K/yr
You are an experienced RTL design engineer with a passion for complex processor systems and interconnect architecture. You bring deep technical expertise, a structured problem-solving approach, and ...
Interconnect Micro-architect/RTL Design Engineer
Austin, TX · On-site
$156K/yr
You are an experienced RTL design engineer with a passion for complex processor systems and interconnect architecture. You bring deep technical expertise, a structured problem-solving approach, and ...
Cpu Rtl Design Engineer information
See Texas salary details
$37.7K - $47.7K
2% of jobs
$47.7K - $57.7K
11% of jobs
$63.1K is the 25th percentile. Wages below this are outliers.
$57.7K - $67.7K
23% of jobs
The median wage is $74.1K / yr.
$67.7K - $77.7K
22% of jobs
$77.7K - $87.7K
17% of jobs
$88K is the 75th percentile. Wages above this are outliers.
$87.7K - $97.7K
9% of jobs
$97.7K - $107.7K
6% of jobs
$107.7K - $117.7K
3% of jobs
$117.7K - $127.7K
3% of jobs
$127.7K - $137.7K
2% of jobs
$137.7K - $147.7K
1% of jobs
$37.7K
$82.1K
$147.7K
How much do cpu rtl design engineer jobs pay per year?
As of Jul 11, 2026, the average yearly pay for cpu rtl design engineer in Texas is $82,125.00, according to ZipRecruiter salary data. Most workers in this role earn between $63,400.00 and $91,800.00 per year, depending on experience, location, and employer.
What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?
| Aspect | Cpu Rtl Design Engineer | Cpu Verification Engineer |
|---|---|---|
| Primary Focus | Designing and developing RTL code for CPU components | Verifying and testing RTL designs for correctness |
| Skills & Certifications | HDL languages (Verilog/VHDL), FPGA/ASIC design experience | HDL, testbench development, simulation tools |
| Work Environment | Design teams, hardware development labs | Verification teams, simulation environments |
| Industry Usage | Semiconductor companies, CPU design firms | ASIC/FPGA verification, chip validation |
While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.
What are some common challenges faced by CPU RTL Design Engineers when collaborating with verification and architecture teams?
CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.
What are the key skills and qualifications needed to thrive as a CPU RTL Design Engineer, and why are they important?
To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.
What are CPU RTL Design Engineers?
CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.
What are popular job titles related to Cpu Rtl Design Engineer jobs in Texas? For Cpu Rtl Design Engineer jobs in Texas, the most frequently searched job titles are:
What job categories do people searching Cpu Rtl Design Engineer jobs in Texas look for? The top searched job categories for Cpu Rtl Design Engineer jobs in Texas are:
What cities in Texas are hiring for Cpu Rtl Design Engineer jobs? Cities in Texas with the most Cpu Rtl Design Engineer job openings:
Apple rating
8.1
Based on 670 frontline employees who took The Breakroom Quiz
5th of 30 rated technology retailers
Job description
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products!
Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of next generation CPUs.
Description
As a RTL Engineer, you will own or participate in the following:
• Microarchitecture development and specification - from early high-level architectural exploration through micro architectural research and arriving at a detailed specification
• RTL feature ownership - development, assessment and refinement of new RTL features to target power, performance, area and timing goals
• Validation - support test bench development and simulation for functional and performance verification
• Performance exploration and correlation - explore high performance strategies and validate that the RTL design meets targeted performance
• Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability, and power
Preferred Qualifications
Knowledge of logic design principles
Expertise with one or more of the following areas: instruction fetch and decode, branch prediction, instruction scheduling, register renaming, out-of-order execution, integer and floating point execution, load/store execution, or cache and memory subsystems
Understanding of timing, power and area tradeoffs in CPU microarchitecture
Understanding of low power and high performance microarchitecture techniques
Experience using an interpretive language such as Perl or Python
Experience with simulators and waveform debugging tools such as Verdi
Minimum Qualifications
Minimum BS and 3+ years of relevant industry experience
Experience with microprocessor architecture
Experience with Verilog or VHDL
Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of next generation CPUs.
Description
As a RTL Engineer, you will own or participate in the following:
• Microarchitecture development and specification - from early high-level architectural exploration through micro architectural research and arriving at a detailed specification
• RTL feature ownership - development, assessment and refinement of new RTL features to target power, performance, area and timing goals
• Validation - support test bench development and simulation for functional and performance verification
• Performance exploration and correlation - explore high performance strategies and validate that the RTL design meets targeted performance
• Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability, and power
Preferred Qualifications
Knowledge of logic design principles
Expertise with one or more of the following areas: instruction fetch and decode, branch prediction, instruction scheduling, register renaming, out-of-order execution, integer and floating point execution, load/store execution, or cache and memory subsystems
Understanding of timing, power and area tradeoffs in CPU microarchitecture
Understanding of low power and high performance microarchitecture techniques
Experience using an interpretive language such as Perl or Python
Experience with simulators and waveform debugging tools such as Verdi
Minimum Qualifications
Minimum BS and 3+ years of relevant industry experience
Experience with microprocessor architecture
Experience with Verilog or VHDL
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976