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Cpu Rtl Design Engineer Jobs in Texas (NOW HIRING)

Apple

RTL Design Engineer

Austin, TX · On-site

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class ...

SambaNova

Principal RTL Design Engineer

Austin, TX · On-site

About the role SambaNova is looking for a Principal RTL Design Engineer to own the microarchitecture and RTL for our next-generation Reconfigurable Dataflow Unit (RDU), the silicon behind our AI ...

ARM

Staff RTL Design Engineer

Austin, TX · On-site

$198K - $268K/yr

As an Interconnect RTL Design Engineer, you will be part of the Systems team focused on next-generation interconnects targeting high-end mobile, automotive, networking, and enterprise markets! You ...

ARM

Staff RTL Design Engineer

Austin, TX · Hybrid

$198K - $268K/yr

As an Interconnect RTL Design Engineer, you will be part of the Systems team focused on next-generation interconnects targeting high-end mobile, automotive, networking, and enterprise markets! You ...

SambaNova

Principal RTL Design Engineer

Austin, TX · On-site

$180K - $255K/yr

About the role SambaNova is looking for a Principal RTL Design Engineer to own the microarchitecture and RTL for our next-generation Reconfigurable Dataflow Unit (RDU), the silicon behind our AI ...

SambaNova

Senior RTL Design Engineer

Austin, TX · On-site

$120K - $200K/yr

RTL implementation, PPA trade-offs, quality gates like lint, CDC, and LEC, and timing closure with About the role SambaNova RTL Design Engineers design component units of the Reconfigurable Dataflow ...

Apple

CPU Microarchitect/RTL Engineer

Austin, TX · On-site

... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...

Apple

CPU Microarchitect/RTL Engineer

Austin, TX

... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...

Apple

CPU Microarchitect/RTL Engineer

Austin, TX · On-site

... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...

Apple

CPU Microarchitect/RTL Engineer

Austin, TX

... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...

Apple

CPU Microarchitect/RTL Engineer

Austin, TX · On-site

... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...

Apple

CPU Microarchitect/RTL Engineer

Austin, TX

... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...

Apple

CPU Microarchitect/RTL Engineer

Austin, TX

... RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability ...

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Showing results 41-60

All JobsCpu Rtl Design Engineer JobsCpu Rtl Design Engineer Jobs in Texas

Cpu Rtl Design Engineer information

See Texas salary details

$37.7K

$82.1K

$147.7K

How much do cpu rtl design engineer jobs pay per year?

As of Sep 10, 2026, the average yearly pay for cpu rtl design engineer in Texas is $82,125.00, according to ZipRecruiter salary data. Most workers in this role earn between $63,400.00 and $91,800.00 per year, depending on experience, location, and employer.

What is a CPU RTL design engineer?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.

What are the key skills and qualifications needed to thrive as a CPU RTL design engineer?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What are some common challenges faced by CPU RTL design engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What are popular job titles related to Cpu Rtl Design Engineer jobs in Texas?

For Cpu Rtl Design Engineer jobs in Texas, the most frequently searched job titles are:

What job categories do people searching Cpu Rtl Design Engineer jobs in Texas look for?

The top searched job categories for Cpu Rtl Design Engineer jobs in Texas are:

What cities in Texas are hiring for Cpu Rtl Design Engineer jobs?

Cities in Texas with the most Cpu Rtl Design Engineer job openings:

Cpu Rtl Design Engineer jobs near you
Infographic showing various Cpu Rtl Design Engineer job openings in Texas as of September 2026, with employment types broken down into 78% Full Time, 2% Part Time, and 20% Contract. Highlights an 94% In-person, 2% Hybrid, and 4% Remote job distribution, with an average salary of $82,125 per year, or $39.5 per hour.

Sr. RTL Design Engineer (Silicon Engineering)

Austin, TX • On-site

SpaceX
Aerospace Product and Parts Manufacturing • 1 - 5K employees
Learn more about SpaceXexternal

Full-time

Re-posted 14 hours ago

SpaceX rating

8.7

Company rating: 8.7 out of 10

Based on 152 frontline employees who took The Breakroom Quiz

18th of 72 rated aerospace companies

Job description

SR. RTL DESIGN ENGINEER (SILICON ENGINEERING) 

At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe. 

We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.   

RESPONSIBILITIES:

  • Evaluate architectural trade-offs based on features, performance requirements and system limitations
  • Define micro-architecture, implement the RTL in Verilog/System Verilog, integrate that in top level and deliver the fully verified, synthesis/timing clean design
  • Work closely with verification team to ensure all aspects of the design are covered and verified
  • Provide timing constraint for those IPs and support the physical implementation team (synthesis, timing closure, formality check)
  • Participate in silicon bring-up and validation

BASIC QUALIFICATIONS:

  • Bachelor's degree in electrical engineering, computer engineering, or computer science
  • 5+ years of experience in RTL implementation

PREFERRED SKILLS AND EXPERIENCE:

  • Ability to solve complex problems including clock domain crossings and power optimization
  • ASIC/SoC system integration experience
  • Experience with embedded CPU subsystems
  • Experience with standard bus protocols (e.g. AXI, AHB, etc.)
  • Experience with high speed and low power design techniques
  • Scripting skills (e.g. Python, etc.)
  • Experience with EDA tools such as HDL simulators and HDL Lint tools
  • Team-player, can-do attitude and ability to work well in a group environment while still contributing on an individual basis
  • Enjoys being challenged and learning new skills

ADDITIONAL REQUIREMENTS:

  • Ability to work extended hours or weekends as needed for mission critical deadlines

What SpaceX employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom

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About SpaceX

Sourced by ZipRecruiter

Industry

Aerospace product and parts manufacturing, data services, guided missile and space vehicle manufacturing and satellite telecommunications

Company size

1,001 - 5,000 Employees

Headquarters location

Hawthorne, CA, US

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