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Cpu Rtl Design Engineer Jobs in Pennsylvania (NOW HIRING)

Cornelis Networks

Signal Integrity Engineer

Wayne, PA · On-site

$151K/yr

... CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI ... Provide design guidelines for platforms based on simulation and 3D modeling activities * Review ...

Cornelis Networks

Signal Integrity Engineer

Wayne, PA · On-site +1

$151K/yr

... CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI ... Provide design guidelines for platforms based on simulation and 3D modeling activities * Review ...

Cornelis Networks, Inc.

Signal Integrity Engineer

Wayne, PA · On-site

$151K/yr

... CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI ... Provide design guidelines for platforms based on simulation and 3D modeling activities * Review ...

Motional

Senior Systems Performance Engineer

Pittsburgh, PA · Hybrid

$101K - $138K/yr

Design and build low-overhead observability infrastructure for resource usage, latency, scheduling ... Improve real-time and post-event root cause analysis across CPU, memory, storage, networking, and ...

Motional

Senior Systems Performance Engineer

Pittsburgh, PA · On-site

$101K - $138K/yr

Design and build low-overhead observability infrastructure for resource usage, latency, scheduling ... Improve real-time and post-event root cause analysis across CPU, memory, storage, networking, and ...

Motional

Senior Systems Performance Engineer

Pittsburgh, PA · Hybrid

$101K - $138K/yr

Design and build low-overhead observability infrastructure for resource usage, latency, scheduling ... Improve real-time and post-event root cause analysis across CPU, memory, storage, networking, and ...

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Showing results 21-40

All JobsCpu Rtl Design Engineer JobsCpu Rtl Design Engineer Jobs in Pennsylvania

Cpu Rtl Design Engineer information

See Pennsylvania salary details

$40.6K

$88.4K

$158.9K

How much do cpu rtl design engineer jobs pay per year?

As of Sep 2, 2026, the average yearly pay for cpu rtl design engineer in Pennsylvania is $88,361.00, according to ZipRecruiter salary data. Most workers in this role earn between $68,200.00 and $98,700.00 per year, depending on experience, location, and employer.

What is a CPU RTL design engineer?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.

What are the key skills and qualifications needed to thrive as a CPU RTL design engineer?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What are some common challenges faced by CPU RTL design engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What are popular job titles related to Cpu Rtl Design Engineer jobs in Pennsylvania?

For Cpu Rtl Design Engineer jobs in Pennsylvania, the most frequently searched job titles are:

What job categories do people searching Cpu Rtl Design Engineer jobs in Pennsylvania look for?

The top searched job categories for Cpu Rtl Design Engineer jobs in Pennsylvania are:

What cities in Pennsylvania are hiring for Cpu Rtl Design Engineer jobs?

Cities in Pennsylvania with the most Cpu Rtl Design Engineer job openings:

Cpu Rtl Design Engineer jobs near you
Infographic showing various Cpu Rtl Design Engineer job openings in Pennsylvania as of June 2026, with employment types broken down into 90% Full Time, 9% Part Time, and 1% Contract. Highlights an 92% Physical, 5% Hybrid, and 3% Remote job distribution, with an average salary of $88,361 per year, or $42.5 per hour.

Senior FPGA Engineer

DELTA INFORMATION SYSTEMS INC

Horsham, PA • On-site

$135K - $165K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 6 days ago

Job description

Description:

Delta Information Systems is seeking a hands-on Senior FPGA Engineer with strong RF communications and DSP experience under our GDP division to design and develop real-world aerospace telemetry hardware.


This role focuses on FPGA/DSP design for RF receivers, taking designs from MATLAB modeling through FPGA implementation, board bring-up, and system integration. You’ll work on mission-critical products used in flight test, missile test, range safety, and space applications.


This is a hardware focused engineering role, not a software only position. Candidates should have hands-on FPGA and board-level experience.


Principle Duties

  • FPGA/DSP design and debug for telemetry RF receivers
  • VHDL-based FPGA design, simulation, and verification
  • MATLAB modeling to support DSP and system architecture
  • Board-level development, PCB oversight, and lab bring-up
  • Integration of embedded CPU and FPGA designs
  • Cross-functional collaboration with engineering and marketing
  • Documentation: requirements, test plans, design reviews
  • Jira-based issue tracking and design reviews


Requirements:


  • BS in Electrical Engineering
  • 5+ years in DSP-based product development
  • Hands-on FPGA design experience (VHDL)
  • RF receiver signal processing experience
  • Familiarity with modulation schemes (PCM/FM, SOQPSK)
  • Familiarity with FEC techniques (LDPC, Viterbi)
  • FPGA simulation + MATLAB experience
  • Lab experience with test equipment
  • Embedded C/C++ a plus
  • U.S. Persons Only (ITAR/EAR)

This position may require exposure to information, which is subject to US export control regulations, i.e. the International Traffic in Arms Regulations (ITAR) or the Export Administration Regulations (EAR). All applicants must be “U.S. persons” within the meaning of U.S. regulations.


This is a 100% onsite role based in Horsham, PA, working closely with hardware, lab equipment, and cross-functional engineering teams.


Compensation

  • Salary Range: $135,000-$165,000 (based on experience)
  • 100% PAID COVERAGE for Medical, Dental, and Vision for the Employee and Dependents
  • 401(k) Employer Match
  • Employee Stock Ownership Program (company funded)
  • Life Insurance (company funded)
  • Short-Term Disability (company funded)
  • Long-Term Disability (company funded)
  • 80 hours (Vacation)
  • 40 hours (Sick Leave)
  • 11 days (Paid Holidays
  • HealthCare FSA
  • Dependent Care FSA

What We Offer

  • Opportunities for training, certifications, and career growth.
  • A mission-driven culture where your work contributes to national security.
  • Exposure to advanced technologies and programs critical to the aerospace and defense sector.

Why Join Delta

  • 50+ years in aerospace telemetry
  • Engineers own designs end-to-end
  • Small, experienced team with minimal bureaucracy
  • Hardware that ships, flies, and is used in the field

About Delta Information Systems, Inc.®
Delta Information Systems (DIS) is an industry-leading supplier of high-quality aerospace telemetry products for Flight Test, Missile Test, Range Safety, Launch Support and Satellite Command and Control applications. Their products address the complete telemetry chain from Data Acquisition, Storage, Transport and Distribution to Telemetry Processing and Display. DIS customers include all DoD entities, all Major Primes, Integrators, Gov Labs, Aircraft & Missile Manufacturers, & Launch Facilities.


In addition, Delta Information Systems (DIS) designs and develops sophisticated electronic equipment that is specifically designed to reliably operate in harsh environments. They deliver critical video communications capability for manned and unmanned Intelligence, Surveillance and Reconnaissance (ISR) programs.