ZipRecruiter

Log In

1

Cpu Architecture Researcher Jobs (NOW HIRING)

next page

Showing results 1-20

All JobsTechnology JobsSoftware JobsSoftware Developer JobsCpu Architecture Researcher Jobs

Cpu Architecture Researcher information

See salary details

$30K

$113.1K

$164.5K

How much do cpu architecture researcher jobs pay per year?

As of Sep 9, 2026, the average yearly pay for cpu architecture researcher in the United States is $113,102.00, according to ZipRecruiter salary data. Most workers in this role earn between $67,000.00 and $154,000.00 per year, depending on experience, location, and employer.

What is the difference between Cpu Architecture Researcher vs Hardware Design Engineer?

AspectCpu Architecture ResearcherHardware Design Engineer
Required CredentialsBachelor's or Master's in Computer Engineering, Electrical Engineering, or related fields; often requires knowledge of computer architectureBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields; focuses on hardware design skills
Work EnvironmentResearch labs, R&D departments, academic settings, often involved in theoretical and experimental researchDesign labs, manufacturing companies, product development teams, focused on creating hardware components
Employer & Industry UsageTech companies, semiconductor firms, research institutionsElectronics companies, semiconductor manufacturers, consumer electronics firms

The main difference between a Cpu Architecture Researcher and a Hardware Design Engineer lies in their focus: the researcher concentrates on developing and analyzing CPU architectures through research and experimentation, while the hardware design engineer implements and tests hardware components based on design specifications. Both roles require strong technical skills but serve different stages of the hardware development process.

What are popular job titles related to Cpu Architecture Researcher jobs?

For Cpu Architecture Researcher jobs, the most frequently searched job titles are:

Infographic showing various Cpu Architecture Researcher job openings in the United States as of September 2026, with employment types broken down into 86% Full Time, and 14% Contract. Highlights an 100% In-person job distribution, with an average salary of $113,102 per year, or $54.4 per hour.

Staff Engineer, Architecture & Performance Research Engineer for Data Center and Agentic AI CPU

San Jose, CA • On-site

Socket.dev
Network Security • 1 - 10 employees
Learn more about Socket.devexternal

Other

Medical, Dental, Vision, Life, Retirement, PTO

Posted 10 days ago

Key responsibilities

  • Shape the architecture and performance direction of next-generation CPU architectures.

  • Develop and refine performance models, evaluate system-level architectural trade-offs, and drive microarchitectural concepts from research to implementation.

  • Work closely with RTL design teams to translate architectural concepts into implementable designs, guide technical decisions, and validate their impact from modeling through silicon.

Job description

Please Note:

To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.

Advancing the World’s Technology Together

Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.

Staff Engineer, Architecture & Performance Research Engineer for Data Center and Agentic AI CPU

What You’ll Do

Architecture Research Lab is focused on researching next-generation CPU (RISC-V) microarchitecture and performance for emerging computing workloads. We explore new architectural ideas, evaluate their performance potential, and rapidly turn promising concepts into working designs that can be validated on real silicon. Our research is driven by emerging opportunities in data center and agentic AI workloads, where we investigate how CPU architecture can evolve to meet new performance and efficiency requirements. We also explore CPU-memory co-design from the CPU perspective, in alignment with the broader shift toward memory-centric architectures. A distinctive aspect of our team is the way we approach architecture research. We develop and apply AI-driven methodologies to accelerate architectural exploration, broaden the design space we can investigate, and quickly iterate from ideas to implementation and silicon validation. Rather than simply following established design flows, we continuously seek new ways to explore, evaluate, and realize CPU architectures. The role offers an opportunity to work across the full spectrum of architecture research—from workload and performance analysis, microarchitectural innovation, and architectural modeling to implementation and silicon validation—while helping shape new methodologies for how future CPUs are designed.

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 43004

As a Staff CPU Architecture & Performance Engineer, you will shape the architecture and performance direction of next-generation CPU architectures. You will identify opportunities across emerging workloads, develop and refine performance models, evaluate system-level architectural trade-offs, and drive new microarchitectural concepts from research to implementation. You will work closely with RTL design teams to translate architectural concepts into implementable designs, guide key technical decisions, and validate their impact from modeling through silicon. The role offers broad ownership across architectural domains, with the opportunity to define new research directions, influence CPU architecture strategy, and drive ideas that can deliver meaningful performance gains in real hardware.

  • Propose new architecture ideas and take ownership of one or more microarchitectural domains, including front-end, mid-end, and back-end
  • Use AI-driven design methodologies to rapidly implement architectural ideas and validate them on real silicon
  • Build, extend, and validate performance models and architectural simulators
  • Perform CPI/IPC analysis and identify root causes of performance bottlenecks
  • Evaluate microarchitectural features and optimizations using trace-driven, analytical, and cycle-accurate models
  • Characterize workloads and benchmarks, including SPEC, server, client, AI/ML, agentic AI, and internal traces
  • Translate performance analysis and modeling results into architectural direction and design decisions
  • Drive research leading to patents and technical publications

    • What You Bring

  • Master’s degree in Computer Engineering, Computer Science, or a related field with 8+ years of relevant experience, or PhD with 5+ years of relevant experience
  • 4+ years of experience in CPU microarchitecture or performance engineering
  • Experience designing RISC-V, ARM, x86 CPU cores, or GPU/NPU vector unit
  • Strong understanding of out-of-order execution, branch prediction, pipelines, speculation, and cache/memory systems
  • Hands-on experience with architectural simulators such as gem5
  • Proficiency in C/C++ and Python
  • Experience analyzing large-scale performance data and traces

    • Preferred Qualifications

  • Experience with AI-driven or agentic design workflows, including high-level design languages and AI-assisted RTL generation, or a strong interest in and ability to quickly learn such methods
  • Understanding of agentic AI workload execution patterns
  • Domain-specific experience in one or more of the following areas:
  • Front-end: Branch prediction and decoupled fetch, particularly for compiler- or interpreter-driven workloads
  • Mid-end: RVV/SIMD, matrix/tensor engine design, and out-of-order vector execution
  • Back-end: LSU/MSHR design and prefetcher design for irregular access patterns
  • Experience with PPA trade-off analysis
  • Experience leading and mentoring junior engineers
  • Experience with CPU tapeout or silicon validation
  • Experience with patents or technical publications
  • You’re inclusive, adapting your style to the situation and diverse global norms of our people.
  • You approach challenges with curiosity and resilience, seeking data to help build understanding.
  • You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
  • Innovative and creative, you proactively explore new ideas and adapt quickly to change

    • #LI-SF1

    What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours.

    Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You’ll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you’ll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That’s why we facilitate a flexible environment so you can find the right balance for you.

    Base Pay Range
    $163,000—$253,000 USD

    Equal Opportunity Employment Policy

    Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status.

    When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations.

    Our Commitment to Innovation and Fairness

    At Samsung Semiconductor, we use Artificial Intelligence (AI) tools in the recruitment process to enhance efficiency. However, AI is used as a support tool, not a final decision-maker. All hiring decisions are made by our human recruiting team and hiring managers to ensure every candidate is evaluated fairly and holistically.

    Recruiting Agency Policy

    We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings.

    Applicant AI Use Policy

    At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we ask that candidates rely on their own knowledge and skills throughout the process. AI tools may be used for basic preparation, grammar, and research, but should not be used to generate or assist with submitted content or live interview responses. If we determine that AI is being used outside these guidelines, we reserve the right to pause or end the interview, and your candidacy may be disqualified.

    Trade Secret Notice

    By submitting an application, you agree not to disclose to Samsung—or encourage Samsung to use—any confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity.

    Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

    #J-18808-Ljbffr

    Apply